Method for manufacturing semiconductor integrated circuit device

• Main Authors: UCHIYAMA HIROYUKI, OKUYAMA KOUSUKE, OYU KIYONORI, KUMAUCHI TAKAHIRO, ICHISE TERUHISA, NAGAI RYO, KUJIRAI HIROSHI, HATA KAZUHIRO
• Format: Patent
• Language: English
• Published: 16.08.2007
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Disclosed is a technique for reducing the leak current by reducing contamination of metal composing a polymetal gate of a MISFET. Of a polycrystalline silicon film, a WN film, a W film, and a cap insulating film formed on a gate insulating film on a p-type well (semiconductor substrate), the cap ins...