Graphical programs with direct memory access FIFO for controller/FPGA communications

A system and method for communicating between graphical programs executing on respective devices, e.g., a programmable hardware element and a controller. The system includes a first node representing a direct memory access structure, e.g., a first in, first out data structure (DMA FIFO), and a secon...

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Bibliographic Details
Main Author BREYER JOHN R
Format Patent
LanguageEnglish
Published 19.04.2007
Subjects
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