Method for encapsulating lead frame packages

• Main Authors: CHUAN LAU K, HENG WONG C, SIANG GOH K, SANG YIP C, LUM RICHARD YEE M
• Format: Patent
• Language: English
• Published: 29.12.2005
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method of encapsulating a plurality of IC chips attached to a lead frame strip that includes an outer frame and a plurality of vertical and horizontal connecting bars attached to the outer frame in a manner that defines a plurality of inner frames arranged in a matrix pattern within the outer frame, each inner frame including an area where an IC chip from the plurality of IC chips is attached. The method comprises, for each inner frame, encasing the IC chip attached to the inner frame along with a portion of the inner frame within a package cavity of a mold sized to form a single integrated circuit package; and injecting encapsulant material into each package cavity, where the encapsulant material is delivered to the package cavity through a series of runners and gates that includes at least one runner positioned on a plane above the lead frame strip, a lead frame runner positioned along a first connecting bar of the lead frame strip and a vertical gate that couples a runner positioned on a plane above the lead frame strip to the lead frame runner and wherein each lead frame runner delivers encapsulant material to a plurality of package cavities positioned adjacent to the lead frame runner.