Method for producing test patterns for testing an integrated circuit

A test pattern generation flow has a stimulus and a device under test (DUT) that operate together through a test bench. The test bench monitors and collects all the data necessary to generate a test program. This information is presented as a captured simulation that allows for ease of generating te...

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Bibliographic Details
Main Authors CARLIN ALAN JOSEPH, CARSON HUBERT GLENN, TUMIN KENNETH PAUL, KOH ALEX S.Y
Format Patent
LanguageEnglish
Published 07.11.2002
Edition7
Subjects
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:A test pattern generation flow has a stimulus and a device under test (DUT) that operate together through a test bench. The test bench monitors and collects all the data necessary to generate a test program. This information is presented as a captured simulation that allows for ease of generating test software, as well as other simulations such as fault simulation and virtual test simulation. The complete and convenient information can be utilized to automate the development and/or easily manually develop and debug the test software.
Bibliography:Application Number: US20010847487