Method for manufacturing memory using pseudo bit line structures and sacrificial layers

• Main Authors: Ping, Er-Xuan, Zhang, Lingguo, Zhou, Zhen
• Format: Patent
• Language: English
• Published: 22.10.2024
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method for manufacturing a memory includes the following steps. A substrate and bit line contact layers are provided. Pseudo bit line structures are formed at tops of the bit line contact layers. Sacrificial layers filling regions between adjacent bit line structures are formed, and the sacrificial layers are located on side walls of the pseudo bit line structures and side walls of the bit line contact layers. After forming the sacrificial layers, the pseudo bit line structures are removed to form through holes exposing the bit line contact layers. Bit line conductive parts filling the through holes and covering the bit line contact layers are formed.