Structure and method for testing of PIC with an upturned mirror

A structure and method for the wafer level testing of interposer-based photonic integrated circuits is described that includes the formation of an upturned mirror structure and the method of utilizing the interposer-based mirror structure for electrical and optical testing of optoelectrical circuits...

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Bibliographic Details
Main Authors Yang, Jing, Venkatesan, Suresh, Soldano, Lucas, Lee, Yong Meng
Format Patent
LanguageEnglish
Published 01.10.2024
Subjects
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