Structure and method for testing of PIC with an upturned mirror
A structure and method for the wafer level testing of interposer-based photonic integrated circuits is described that includes the formation of an upturned mirror structure and the method of utilizing the interposer-based mirror structure for electrical and optical testing of optoelectrical circuits...
Saved in:
Main Authors | , , , |
---|---|
Format | Patent |
Language | English |
Published |
01.10.2024
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Be the first to leave a comment!