Integrated circuit devices

A method of manufacturing an integrated circuit device, the method including forming a plurality of target patterns on a substrate such that an opening is defined between two adjacent target patterns; forming a pyrolysis material layer on the substrate such that the pyrolysis material layer partiall...

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Bibliographic Details
Main Authors Kim, Munjun, Lee, Seungheon, Han, Taejong, Koh, Jaekang, Kwon, Hyukwoo
Format Patent
LanguageEnglish
Published 19.09.2023
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method of manufacturing an integrated circuit device, the method including forming a plurality of target patterns on a substrate such that an opening is defined between two adjacent target patterns; forming a pyrolysis material layer on the substrate such that the pyrolysis material layer partially fills the opening and exposes an upper surface and a portion of a sidewall of the two adjacent target patterns; and forming a material layer on the exposed upper surface and the exposed portion of the sidewall of the two adjacent target patterns, wherein, during the forming of the material layer, the material layer does not remain on a resulting surface of the pyrolysis material layer.
Bibliography:Application Number: US202217672939