Interlayer dielectric layer

The present disclosure describes a method for forming a silicon-based, carbon-rich, low-k ILD layer with a carbon concentration between about 15 atomic % and about 20 atomic %. For example, the method includes depositing a dielectric layer, over a substrate, with a dielectric material having a diele...

Full description

Saved in:
Bibliographic Details
Main Authors Liou, Joung-Wei, Shen, Bo-Jhih, Chiu, Yi-Wei
Format Patent
LanguageEnglish
Published 05.09.2023
Subjects
Online AccessGet full text

Cover

Loading…
Abstract The present disclosure describes a method for forming a silicon-based, carbon-rich, low-k ILD layer with a carbon concentration between about 15 atomic % and about 20 atomic %. For example, the method includes depositing a dielectric layer, over a substrate, with a dielectric material having a dielectric constant below 3.9 and a carbon atomic concentration between about 15% and about 20%; exposing the dielectric layer to a thermal process configured to outgas the dielectric material; etching the dielectric layer to form openings; and filling the openings with a conductive material to form conductive structures.
AbstractList The present disclosure describes a method for forming a silicon-based, carbon-rich, low-k ILD layer with a carbon concentration between about 15 atomic % and about 20 atomic %. For example, the method includes depositing a dielectric layer, over a substrate, with a dielectric material having a dielectric constant below 3.9 and a carbon atomic concentration between about 15% and about 20%; exposing the dielectric layer to a thermal process configured to outgas the dielectric material; etching the dielectric layer to form openings; and filling the openings with a conductive material to form conductive structures.
Author Shen, Bo-Jhih
Liou, Joung-Wei
Chiu, Yi-Wei
Author_xml – fullname: Liou, Joung-Wei
– fullname: Shen, Bo-Jhih
– fullname: Chiu, Yi-Wei
BookMark eNrjYmDJy89L5WSQ9swrSS3KSaxMLVJIyUzNSU0uKcpMVgAL8DCwpiXmFKfyQmluBkU31xBnD93Ugvz41OKCxOTUvNSS-NBgQ0NzE0tTM2MnI2Ni1AAAZIslkA
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
ExternalDocumentID US11749563B2
GroupedDBID EVB
ID FETCH-epo_espacenet_US11749563B23
IEDL.DBID EVB
IngestDate Fri Jul 19 12:48:07 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_US11749563B23
Notes Application Number: US201816138106
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230905&DB=EPODOC&CC=US&NR=11749563B2
ParticipantIDs epo_espacenet_US11749563B2
PublicationCentury 2000
PublicationDate 20230905
PublicationDateYYYYMMDD 2023-09-05
PublicationDate_xml – month: 09
  year: 2023
  text: 20230905
  day: 05
PublicationDecade 2020
PublicationYear 2023
RelatedCompanies Taiwan Semiconductor Manufacturing Co., Ltd
RelatedCompanies_xml – name: Taiwan Semiconductor Manufacturing Co., Ltd
Score 3.4953465
Snippet The present disclosure describes a method for forming a silicon-based, carbon-rich, low-k ILD layer with a carbon concentration between about 15 atomic % and...
SourceID epo
SourceType Open Access Repository
SubjectTerms BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Title Interlayer dielectric layer
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230905&DB=EPODOC&locale=&CC=US&NR=11749563B2
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwY2BQSbZMTrVMSTHWtUw2MdE1MU1K0000sEzVTTYyTAM2XxNTDQ1AG5x9_cw8Qk28IkwjmBiyYHthwOeEloMPRwTmqGRgfi8Bl9cFiEEsF_DaymL9pEygUL69W4itixq0dwxsT1samKq5ONm6Bvi7-DurOTvbhgar-QXZGgJb3sCugLETsLhmBTajzUHLv1zDnEC7UgqQqxQ3QQa2AKBpeSVCDEypecIMnM6wm9eEGTh8oRPeQCY07xWLMEiDB-9yEoFtZIWUTMj1NZnJCmABUQZFN9cQZw9doC3xcC_FhwYjHGQsxsAC7OqnSjAopJgAu0PAaivN3DTFxMI0xSLVJMkwJRWY54B92ETLREkGKdzmSOGTlGbgAgUPeHWUqQwDS0lRaaossDotSZIDhwMAO0h5qQ
link.rule.ids 230,309,783,888,25578,76884
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwY2BQSbZMTrVMSTHWtUw2MdE1MU1K0000sEzVTTYyTAM2XxNTDQ1AG5x9_cw8Qk28IkwjmBiyYHthwOeEloMPRwTmqGRgfi8Bl9cFiEEsF_DaymL9pEygUL69W4itixq0dwxsT1samKq5ONm6Bvi7-DurOTvbhgar-QXZGgJb3sCugLETsLhmBTaxLUDn7LuGOYF2pRQgVyluggxsAUDT8kqEGJhS84QZOJ1hN68JM3D4Qie8gUxo3isWYZAGD97lJALbyAopmZDrazKTFcACogyKbq4hzh66QFvi4V6KDw1GOMhYjIEF2NVPlWBQSDEBdoeA1VaauWmKiYVpikWqSZJhSiowzwH7sImWiZIMUrjNkcInKc_A6RHi6xPv4-nnLc3ABQoq8EopUxkGlpKi0lRZYNVakiQHDhMAFth8mQ
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Interlayer+dielectric+layer&rft.inventor=Liou%2C+Joung-Wei&rft.inventor=Shen%2C+Bo-Jhih&rft.inventor=Chiu%2C+Yi-Wei&rft.date=2023-09-05&rft.externalDBID=B2&rft.externalDocID=US11749563B2