Method for co-packaging light engine chiplets on switch substrate
A method for co-packaging multiple light engines in a switch module is provided. The method includes providing a module substrate with a minimum lateral dimension no greater than 110 mm. The module substrate is configured with a first mounting site at a center region and a plurality of second mounti...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
02.11.2021
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Subjects | |
Online Access | Get full text |
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Summary: | A method for co-packaging multiple light engines in a switch module is provided. The method includes providing a module substrate with a minimum lateral dimension no greater than 110 mm. The module substrate is configured with a first mounting site at a center region and a plurality of second mounting sites distributed densely along the peripheral sides. The method includes disposing a main die with a switch processor chip at the first mounting site. The switch processor chip is configured to operate with a digital-signal processing (DSP) interface for extra-short-reach data interconnect. The method further includes mounting a plurality of chiplet dies respectively into the plurality of second mounting sites. Each chiplet die is configured to be a packaged light engine with a minimum lateral dimension to allow a maximum number of chiplet dies with <50 mm from the main die for extra-short-reach data interconnect. |
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Bibliography: | Application Number: US202016894622 |