Power delivery timing for memory
A system can comprise a memory device and sequencing circuitry configured to provide enable signals to a number of voltage regulators in association with providing sequenced power signals to the memory device. The system can include voltage threshold detection circuitry configured to: detect primary...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
29.12.2020
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Subjects | |
Online Access | Get full text |
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