Memory chip that suspends transfer phase and resumes transfer phase

According to one embodiment, a memory system includes a non-volatile memory and a controller. The memory includes a memory cell array. The controller is configured to control a transfer phase in which a command, an address, and first data are transferred to the memory, and a program phase in which t...

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Main Authors Suzuki, Riki, Kojima, Yoshihisa, Endo, Shizuka
Format Patent
LanguageEnglish
Published 25.08.2020
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Abstract According to one embodiment, a memory system includes a non-volatile memory and a controller. The memory includes a memory cell array. The controller is configured to control a transfer phase in which a command, an address, and first data are transferred to the memory, and a program phase in which the first data is programmed into the memory cell array by the memory after the transfer phase. The controller is configured to suspend the transfer phase after initiating the transfer phase before completion of the transfer phase, then read second data from the memory, and resume the transfer phase after reading of the second data is completed.
AbstractList According to one embodiment, a memory system includes a non-volatile memory and a controller. The memory includes a memory cell array. The controller is configured to control a transfer phase in which a command, an address, and first data are transferred to the memory, and a program phase in which the first data is programmed into the memory cell array by the memory after the transfer phase. The controller is configured to suspend the transfer phase after initiating the transfer phase before completion of the transfer phase, then read second data from the memory, and resume the transfer phase after reading of the second data is completed.
Author Suzuki, Riki
Endo, Shizuka
Kojima, Yoshihisa
Author_xml – fullname: Suzuki, Riki
– fullname: Kojima, Yoshihisa
– fullname: Endo, Shizuka
BookMark eNrjYmDJy89L5WRw9k3NzS-qVEjOyCxQKMlILFEoLi0uSM1LKVYoKUrMK05LLVIoyEgsTlVIzEtRKEotLs1NRZfiYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxocGGBuamJqamxk5GxsSoAQC3ADSe
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
Physics
ExternalDocumentID US10754553B2
GroupedDBID EVB
ID FETCH-epo_espacenet_US10754553B23
IEDL.DBID EVB
IngestDate Fri Jul 19 15:06:12 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_US10754553B23
Notes Application Number: US201816125298
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200825&DB=EPODOC&CC=US&NR=10754553B2
ParticipantIDs epo_espacenet_US10754553B2
PublicationCentury 2000
PublicationDate 20200825
PublicationDateYYYYMMDD 2020-08-25
PublicationDate_xml – month: 08
  year: 2020
  text: 20200825
  day: 25
PublicationDecade 2020
PublicationYear 2020
RelatedCompanies Toshiba Memory Corporation
RelatedCompanies_xml – name: Toshiba Memory Corporation
Score 3.2894251
Snippet According to one embodiment, a memory system includes a non-volatile memory and a controller. The memory includes a memory cell array. The controller is...
SourceID epo
SourceType Open Access Repository
SubjectTerms CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Title Memory chip that suspends transfer phase and resumes transfer phase
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200825&DB=EPODOC&locale=&CC=US&NR=10754553B2
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1bS8MwFD6MeX3Tqui8EEH6VoTesj4UoWnLEHbBrbK30WYd3R66smaI_96T0DkR9DWBkBw45_tO8uUcgKccURRheWHYiM6G7XLLSCmlBjdN7rlmJkuaS7XFwO0l9uvUmbZgtfsLo-qEfqjiiOhRHP1dqHhd7S-xQqWtrJ-zJQ6tX-KJH-pNdmyqjEcPAz8aDcMh0xnzk7E-eJO9VZErOFaA4foAaTSV8q_oPZC_UqqfkBKfweEIVyvFObTyUoMTtuu8psFxv3nw1uBIKTR5jYONF9YXwPpSHvtJeLGsiChSQeptLXvZ1kQoHppvSFUgPJG0nBPMpzH-_J66hMc4mrCegfuafRthloz3R7CuoF2uy_waiJ3R7txxKbIaz0aq4yHfsZ3My80uT1NrcQOdv9fp_Dd5C6fSoPL-1HTuoC022_weAVhkD8pyX39WiUk
link.rule.ids 230,309,783,888,25578,76884
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LS8NAEB5KfdSbVqXW1wqSWxDybA5FyKYlal_YRnoryTYl9ZCG7hbx3zu7pFYEve7Asjsw830zOzsDcJ8iiiIsL3QL0Vm3HGbqseu6OjMM5jlGIluay2qLgRNG1vPUnlbgffsXRvUJ_VDNEdGiGNq7UP662CWxAlVbyR-SJS6tHruTdqCV0bGhIh4t8Nud0TAYUo3SdjTWBq9ytipyBdv00V3vIcVuyT77nTdf_kopfkJK9xj2R7hbLk6gkuZ1qNHt5LU6HPbLB-86HKgKTcZxsbRCfgq0L8tjPwnLlgURWSwI33A5y5YToXhouiZFhvBE4nxOMJ5G__NbdAZ33c6Ehjqea_athFk03l3BPIdqvsrTBhArcVtz23GR1XgWUh0P-Y5lJ15qtFgcm4sLaP69T_M_4S3Uwkm_N-s9DV4u4UgqV-ZSDfsKqmK9Sa8RjEVyo7T4BRe5jDk
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Memory+chip+that+suspends+transfer+phase+and+resumes+transfer+phase&rft.inventor=Suzuki%2C+Riki&rft.inventor=Kojima%2C+Yoshihisa&rft.inventor=Endo%2C+Shizuka&rft.date=2020-08-25&rft.externalDBID=B2&rft.externalDocID=US10754553B2