Semiconductor logic device and system and method of embedded packaging of same
A reconfigured semiconductor logic device includes a semiconductor logic device comprising a plurality of input/output (I/O) pads formed on an active surface thereof and a redistribution layer. The redistribution layer comprises an insulating layer formed atop the active surface of the semiconductor...
Saved in:
Main Authors | , |
---|---|
Format | Patent |
Language | English |
Published |
18.02.2020
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | A reconfigured semiconductor logic device includes a semiconductor logic device comprising a plurality of input/output (I/O) pads formed on an active surface thereof and a redistribution layer. The redistribution layer comprises an insulating layer formed atop the active surface of the semiconductor logic device such that the insulating layer does not extend beyond an outer perimeter of the active surface and a patterned conductive wiring layer positioned above the insulating layer. The patterned conductive wiring layer includes a plurality of terminal buses formed on a top surface of the insulating layer. Each terminal bus of the plurality of terminal buses is electrically coupled to multiple I/O pads of the plurality of I/O pads through vias formed in the insulating layer. |
---|---|
Bibliography: | Application Number: US201715816360 |