Banking register renaming to reduce power
According to one general aspect, an apparatus may include a register circuit and an instruction scheduler circuit. The register circuit may include a plurality of physical registers that are partitioned into at least a common portion that is associated with a predefined plurality of instructions, an...
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| Main Author | |
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| Format | Patent |
| Language | English |
| Published |
01.10.2019
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| Subjects | |
| Online Access | Get full text |
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| Abstract | According to one general aspect, an apparatus may include a register circuit and an instruction scheduler circuit. The register circuit may include a plurality of physical registers that are partitioned into at least a common portion that is associated with a predefined plurality of instructions, and a shared portion, and a plurality of write ports, wherein each portion is associated with at least one respective write port. The instruction scheduler circuit configured to determine an instruction, and rename an architectural register associated with the instruction to a physical register. Wherein the portion including the physical register is selected based, at least in part, upon a characteristic of the current instruction. |
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| AbstractList | According to one general aspect, an apparatus may include a register circuit and an instruction scheduler circuit. The register circuit may include a plurality of physical registers that are partitioned into at least a common portion that is associated with a predefined plurality of instructions, and a shared portion, and a plurality of write ports, wherein each portion is associated with at least one respective write port. The instruction scheduler circuit configured to determine an instruction, and rename an architectural register associated with the instruction to a physical register. Wherein the portion including the physical register is selected based, at least in part, upon a characteristic of the current instruction. |
| Author | Ghiya, Ankit |
| Author_xml | – fullname: Ghiya, Ankit |
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| Notes | Application Number: US201715657076 |
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| RelatedCompanies | Samsung Electronics Co., Ltd |
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| Snippet | According to one general aspect, an apparatus may include a register circuit and an instruction scheduler circuit. The register circuit may include a plurality... |
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| SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| Title | Banking register renaming to reduce power |
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