Local closed loop efficiency control using IP metrics
According to one embodiment, a processor includes an instruction decoder to decode instruction and a execution unit to execute instructions, the execution unit being associated with a capture logic to periodically capture operating heuristics of the execution unit, a detection logic coupled to the e...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
27.08.2019
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Subjects | |
Online Access | Get full text |
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