Integrating system in package (SIP) with input/output (IO) board for platform miniaturization

Methods and apparatus relating to integrating System in Package (SiP) with Input/Output (IO) board for platform miniaturization are described. In an embodiment, a SiP board includes a plurality of logic components. An IO board is coupled to the SiP board via a grid array. The plurality of logic comp...

Full description

Saved in:
Bibliographic Details
Main Authors Hoe, Wee, Goh, Eng Huat, Yong, Khang Choong, Ooi, Ping Ping
Format Patent
LanguageEnglish
Published 20.08.2019
Subjects
Online AccessGet full text

Cover

Loading…
Abstract Methods and apparatus relating to integrating System in Package (SiP) with Input/Output (IO) board for platform miniaturization are described. In an embodiment, a SiP board includes a plurality of logic components. An IO board is coupled to the SiP board via a grid array. The plurality of logic components is provided on both sides of the SiP board and one or more of the plurality of logic components are to positioned in an opening in the IO board. Other embodiments are also disclosed and claimed.
AbstractList Methods and apparatus relating to integrating System in Package (SiP) with Input/Output (IO) board for platform miniaturization are described. In an embodiment, a SiP board includes a plurality of logic components. An IO board is coupled to the SiP board via a grid array. The plurality of logic components is provided on both sides of the SiP board and one or more of the plurality of logic components are to positioned in an opening in the IO board. Other embodiments are also disclosed and claimed.
Author Yong, Khang Choong
Ooi, Ping Ping
Hoe, Wee
Goh, Eng Huat
Author_xml – fullname: Hoe, Wee
– fullname: Goh, Eng Huat
– fullname: Yong, Khang Choong
– fullname: Ooi, Ping Ping
BookMark eNqNzb0KwkAQBOArtPDvHdYuKcSfQEitKKZSiJYSVt3Ew2TvuNsg-vRe4QNYfTAMM0PVY8M0UJechWqHorkG__ZCLWgGi7cn1gRRkR9jeGl5hNR2MjedBCDKDzFcDbo7VMaBbVCCLbSaNUrn9CcsGh6rfoWNp8nPkZrutqfNfkbWlOTDCzFJeS6WiyTL0iRdr5J_Ol_JlD1t
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
ExternalDocumentID US10388636B2
GroupedDBID EVB
ID FETCH-epo_espacenet_US10388636B23
IEDL.DBID EVB
IngestDate Fri Jul 19 12:50:07 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_US10388636B23
Notes Application Number: US201515777458
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190820&DB=EPODOC&CC=US&NR=10388636B2
ParticipantIDs epo_espacenet_US10388636B2
PublicationCentury 2000
PublicationDate 20190820
PublicationDateYYYYMMDD 2019-08-20
PublicationDate_xml – month: 08
  year: 2019
  text: 20190820
  day: 20
PublicationDecade 2010
PublicationYear 2019
RelatedCompanies Intel Corporation
RelatedCompanies_xml – name: Intel Corporation
Score 3.2187762
Snippet Methods and apparatus relating to integrating System in Package (SiP) with Input/Output (IO) board for platform miniaturization are described. In an...
SourceID epo
SourceType Open Access Repository
SubjectTerms BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
Title Integrating system in package (SIP) with input/output (IO) board for platform miniaturization
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190820&DB=EPODOC&locale=&CC=US&NR=10388636B2
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3NS8MwFH-MKepNp-LmBxGkbIeytKt1OxRh7cYmuBa7yi4ymraBqbTFpfjv-1I750VPCQmE5JH3mfd-AbjR0EHTWZyocYi-iZEwUw1jrqlaTENuMJ1yXibIzsxJYDwsbhc1eN3UwpQ4oZ8lOCJyVIT8Lkp5nW-DWE6ZW7nushUOZffjueUolXesyQ-8qeIMrZHnOq6t2LYV-MrsyZI44H2zZw5RXO-gGX0nuWH0PJRVKflvlTI-hF0PV0vFEdSStAH79ubntQbsPVYP3titeG99DC_TCtkBlQ35BmAmq5Tg9t9QJpC2P_U6RIZVcTQvRDcrBDakPXU7hGV4EQjapyR_D4W0U4nEFJGgnlUd5glcj0dze6LiPpc_RFkG_vZIvVOop1manAExI8oiPab9qG8YEeWMD3jEEnSCdc4GZtiE1t_rtP6bPIcDSWAZT9XpBdTFR5FcokIW7Kqk5BeRiJJ2
link.rule.ids 230,309,783,888,25576,76876
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3NS8MwFH-MKc6bTsXNrwhStkNZ2tW6HYqwdmPVfeE22UVK0zYwlba4DP99X2rnvOgpIYGQPPI-894vADcaOmg6CyM19NE3MSJmqn7INVULqc8NplPOswTZkdmfGw-L20UBXje1MBlO6GcGjogcFSC_i0xep9sglpPlVq4abIlDyX1vZjlK7h1r8gNvqjgdqzsZO2NbsW1rPlVGT5bEAW-ZTbOD4noHTew7yQ3d546sSkl_q5TeAexOcLVYHEIhistQsjc_r5Vhb5g_eGM3573VEby4ObIDKhvyDcBMljHB7b-hTCC1qTupExlWxdF0LRrJWmBDau64TliCF4GgfUrSd19IO5VITBEJ6pnXYR7Dda87s_sq7tP7IYo3n26P1DyBYpzE0SkQM6As0EPaClqGEVDOeJsHLEInWOesbfoVqP69TvW_ySso9WfDgTdwR49nsC-JLWOrOj2HovhYRxeonAW7zKj6BZxZlWk
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Integrating+system+in+package+%28SIP%29+with+input%2Foutput+%28IO%29+board+for+platform+miniaturization&rft.inventor=Hoe%2C+Wee&rft.inventor=Goh%2C+Eng+Huat&rft.inventor=Yong%2C+Khang+Choong&rft.inventor=Ooi%2C+Ping+Ping&rft.date=2019-08-20&rft.externalDBID=B2&rft.externalDocID=US10388636B2