Process integration method to tune resistivity of nickel silicide
Methods for depositing a low resistivity nickel silicide layer used in forming an interconnect and electronic devices formed using the methods are described herein. In one embodiment, a method for depositing a layer includes positioning a substrate on a substrate support in a processing chamber, the...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
20.08.2019
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Subjects | |
Online Access | Get full text |
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