Conditions for burn-in of high power semiconductors

• Main Authors: Rhodes, David Michael, McKay, James Leroy, Shen, Likun, Smith, Kurt Vernon, Barr, Ronald Avrom
• Format: Patent
• Language: English
• Published: 11.06.2019
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MEASURING; MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES; PHYSICS; SEMICONDUCTOR DEVICES; TESTING

Techniques for improving reliability of III-N devices include holding the III-N devices at a first temperature less than or equal to 30° for a first period of time while applying a first gate-source voltage lower than a threshold voltage of the III-N devices and a first drain-source voltage greater than 0.2 times a break down voltage of the III-N devices; and holding the III-N devices at a second temperature greater than the first temperature for a second period of time while applying a second gate-source voltage lower than a threshold voltage of the III-N devices and a second drain-source voltage greater than 0.2 times a breakdown voltage of the III-N devices. After holding the III-N devices at the first and second temperatures, screening the III-N devices based on electrical performance of one or more parameters of the III-N devices.