Quantization noise cancellation for fractional-N phased-locked loop

A system includes an oscillator, a frequency divider, and a delay circuit. The oscillator may generate a clock signal using a reference signal. A frequency of the clock signal may be a non-integer multiple of a frequency of the reference signal. The frequency divider may generate a feedback signal u...

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Bibliographic Details
Main Authors Deng, Wei, Fischette, Jr., Dennis M, Zhao, Feng
Format Patent
LanguageEnglish
Published 19.02.2019
Subjects
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