Quantization noise cancellation for fractional-N phased-locked loop
A system includes an oscillator, a frequency divider, and a delay circuit. The oscillator may generate a clock signal using a reference signal. A frequency of the clock signal may be a non-integer multiple of a frequency of the reference signal. The frequency divider may generate a feedback signal u...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
19.02.2019
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Subjects | |
Online Access | Get full text |
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