Memory, control apparatus, clock processing method, and electronic device

A memory (10), a control apparatus, a clock processing method, and an electronic device. A clock processing circuit (20) in the memory (10) comprises: a duty ratio module (21), which is configured to adjust the duty ratio of a data clock signal and output an internal clock signal; a first clock gene...

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Bibliographic Details
Main Author CHENG, JINGWEI
Format Patent
LanguageChinese
English
Published 01.02.2024
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Summary:A memory (10), a control apparatus, a clock processing method, and an electronic device. A clock processing circuit (20) in the memory (10) comprises: a duty ratio module (21), which is configured to adjust the duty ratio of a data clock signal and output an internal clock signal; a first clock generation module (22), which is configured to receive the internal clock signal and output a first read clock signal on the basis of the internal clock signal, wherein the first read clock signal is a pulse signal; a second clock generation module (23), which is configured to generate and output a second read clock signal, wherein the second read clock signal only has one level state change edge; and a selection module (24), which is configured to receive the first read clock signal and the second read clock signal, and output one of the first read clock signal and the second read clock signal as a target read clock signal.
Bibliography:Application Number: TW202312103885