Method and system to improve wafer edge uniformity
Exemplary semiconductor processing systems may include a chamber body having sidewalls and a base. The semiconductor processing systems may include a substrate support extending through the base of the chamber body. The substrate support may include a support plate. The substrates support may includ...
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| Main Author | |
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| Format | Patent |
| Language | Chinese English |
| Published |
21.10.2023
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| Subjects | |
| Online Access | Get full text |
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| Abstract | Exemplary semiconductor processing systems may include a chamber body having sidewalls and a base. The semiconductor processing systems may include a substrate support extending through the base of the chamber body. The substrate support may include a support plate. The substrates support may include a shaft coupled with the support plate. The semiconductor processing systems may include a liner positioned within the chamber body and positioned radially outward of a peripheral edge of the support plate. An inner surface of the liner may include an emissivity texture. |
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| AbstractList | Exemplary semiconductor processing systems may include a chamber body having sidewalls and a base. The semiconductor processing systems may include a substrate support extending through the base of the chamber body. The substrate support may include a support plate. The substrates support may include a shaft coupled with the support plate. The semiconductor processing systems may include a liner positioned within the chamber body and positioned radially outward of a peripheral edge of the support plate. An inner surface of the liner may include an emissivity texture. |
| Author | TONG, MINGLE |
| Author_xml | – fullname: TONG, MINGLE |
| BookMark | eNrjYmDJy89L5WQw8k0tychPUUjMS1EoriwuSc1VKMlXyMwtKMovS1UoT0xLLVJITUlPVSjNy0zLL8rNLKnkYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxIeGeFoaWppbmTk7GRCgBAHiOLg0 |
| ContentType | Patent |
| DBID | EVB |
| DatabaseName | esp@cenet |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Medicine Chemistry Sciences |
| ExternalDocumentID | TWI819597BB |
| GroupedDBID | EVB |
| ID | FETCH-epo_espacenet_TWI819597BB3 |
| IEDL.DBID | EVB |
| IngestDate | Fri Nov 01 05:38:53 EDT 2024 |
| IsOpenAccess | true |
| IsPeerReviewed | false |
| IsScholarly | false |
| Language | Chinese English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-epo_espacenet_TWI819597BB3 |
| Notes | Application Number: TW20220117078 |
| OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231021&DB=EPODOC&CC=TW&NR=I819597B |
| ParticipantIDs | epo_espacenet_TWI819597BB |
| PublicationCentury | 2000 |
| PublicationDate | 20231021 |
| PublicationDateYYYYMMDD | 2023-10-21 |
| PublicationDate_xml | – month: 10 year: 2023 text: 20231021 day: 21 |
| PublicationDecade | 2020 |
| PublicationYear | 2023 |
| RelatedCompanies | APPLIED MATERIALS, INC |
| RelatedCompanies_xml | – name: APPLIED MATERIALS, INC |
| Score | 3.63226 |
| Snippet | Exemplary semiconductor processing systems may include a chamber body having sidewalls and a base. The semiconductor processing systems may include a substrate... |
| SourceID | epo |
| SourceType | Open Access Repository |
| SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| Title | Method and system to improve wafer edge uniformity |
| URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231021&DB=EPODOC&locale=&CC=TW&NR=I819597B |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfR3LSsNAcKhV1JtWxfpiD5JbMO9uDkHIo1QhbZFoeyubdUN76IM2peDXO7sm6kVvwy7M7g7Me2cG4L4oWI56nekmArrj2kL3XWrq3LOt3DMY50IWOKd9r_fqPI_dcQOmdS2M6hO6U80RkaM48nup5PXqJ4gVq7-Vm4d8hkvLx24WxFrlHUtjxTK1OAyS4SAeRFoUBdlI678ETzJf5HfCPdhHI7ojeSF5C2VNyuq3QumewMEQcS3KU2h8TFtwFNVz11pwmFbpbgQrztucgZWqUc8EHX_y1X2ZlEsyUyEBQXasEGsiQ2Nku5C1VnM0rs-BdJMs6ul4-OT7nZNsVN8ytC-gie6_uATie9xijDq58U4d6tmMGQYTVLp2hfAob0P7TzRX_-xdw7EkmJTDlnkDzXK9FbeoYMv8TtHmExdzgbM |
| link.rule.ids | 230,309,783,888,25576,76876 |
| linkProvider | European Patent Office |
| linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfR3LTsJAcIJoxJuiRnzuwfTW2DftoTHpK0UpEFOFG9mWbeAgECgh8eudXal60dtkN5ndnWTeOzMA90VBM9TrVFYRkA1TZ7Jj2qqcW7qWWQrNc8YLnJOeFb8aTyNzVINpVQsj-oRuRXNE5Kgc-b0U8nr5E8QKxN_K9UM2w6XFY5S6gbTzjrmxoqlS4LnhoB_0fcn33XQo9V7cDs8XOW1vD_bRwG5zXgjfPF6TsvytUKJjOBggrnl5ArWPaRMafjV3rQmHyS7djeCO89anoCVi1DNBx598dV8m5YLMREiAkS0t2Irw0BjZzHmt1Tsa12dAojD1YxkPH3-_c5wOq1t6-jnU0f1nF0AcK9cotY1MmdiGbemUKgplNnftCmbZeQtaf6K5_GfvDhpxmnTH3U7v-QqOOPG4TNbUa6iXqw27QWVbZreCTp9X94Sm |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Method+and+system+to+improve+wafer+edge+uniformity&rft.inventor=TONG%2C+MINGLE&rft.date=2023-10-21&rft.externalDBID=B&rft.externalDocID=TWI819597BB |