A duty margin monitoring circuit and a method for monitoring a duty margin of a target signa
A duty margin monitoring circuit (220), coupled to a functional circuit (210) which generates a first output signal in response to a target signal, includes a modulation circuit (260), a replica circuit (270) and an error detection circuit (280). The modulation circuit (260) is arranged to receive t...
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Main Authors | , , , , |
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Format | Patent |
Language | Chinese English |
Published |
21.03.2023
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Subjects | |
Online Access | Get full text |
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Summary: | A duty margin monitoring circuit (220), coupled to a functional circuit (210) which generates a first output signal in response to a target signal, includes a modulation circuit (260), a replica circuit (270) and an error detection circuit (280). The modulation circuit (260) is arranged to receive the target signal and modulate the target signal to generate a modulated target signal. The replica circuit (270) is arranged to receive the modulated target signal and generate a second output signal in response to the modulated target signal. The error detection circuit (280) is coupled to the functional circuit (210) and the replica circuit (270) to receive the first output signal and the second output signal and arranged to generate an error detection result according to the first output signal and the second output signal. |
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Bibliography: | Application Number: TW202110143333 |