A MEMORY DEVICE WITH FLIP FLOP STANDARD CELL AND METHOD FOR LATCHING SIGNAL

A flip flop standard cell that includes a data input terminal configured to receive a data signal, clock input terminal configured to receive a clock signal, a data output terminal, and a latch. A bit write circuit is configured to receive a bit write signal. The received data signal is latched and...

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Bibliographic Details
Main Authors SAMRA, NICK, RUSU, STEFAN, GUO, TA PEN
Format Patent
LanguageChinese
English
Published 21.11.2020
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Abstract A flip flop standard cell that includes a data input terminal configured to receive a data signal, clock input terminal configured to receive a clock signal, a data output terminal, and a latch. A bit write circuit is configured to receive a bit write signal. The received data signal is latched and provided at the output terminal in response to the bit write signal and the clock signal. A hold circuit is configured to receive a hold signal, and the received data signal is not latched and provided at the data output terminal in response to the hold signal and the clock signal.
AbstractList A flip flop standard cell that includes a data input terminal configured to receive a data signal, clock input terminal configured to receive a clock signal, a data output terminal, and a latch. A bit write circuit is configured to receive a bit write signal. The received data signal is latched and provided at the output terminal in response to the bit write signal and the clock signal. A hold circuit is configured to receive a hold signal, and the received data signal is not latched and provided at the data output terminal in response to the hold signal and the clock signal.
Author RUSU, STEFAN
SAMRA, NICK
GUO, TA PEN
Author_xml – fullname: SAMRA, NICK
– fullname: RUSU, STEFAN
– fullname: GUO, TA PEN
BookMark eNrjYmDJy89L5WTwdlTwdfX1D4pUcHEN83R2VQj3DPFQcPPxDAAS_gEKwSGOfi6OQS4Kzq4-PgpANlB5iIe_i4Kbf5CCj2OIs4enn7tCsKe7n6MPDwNrWmJOcSovlOZmUHBzBarQTS3Ij08tLkhMTs1LLYkPCfc0NzQ0MLZ0cjImQgkAE8Yu2g
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
Physics
ExternalDocumentID TWI711039BB
GroupedDBID EVB
ID FETCH-epo_espacenet_TWI711039BB3
IEDL.DBID EVB
IngestDate Fri Aug 23 06:58:02 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language Chinese
English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_TWI711039BB3
Notes Application Number: TW20198128984
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20201121&DB=EPODOC&CC=TW&NR=I711039B
ParticipantIDs epo_espacenet_TWI711039BB
PublicationCentury 2000
PublicationDate 20201121
PublicationDateYYYYMMDD 2020-11-21
PublicationDate_xml – month: 11
  year: 2020
  text: 20201121
  day: 21
PublicationDecade 2020
PublicationYear 2020
RelatedCompanies TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
RelatedCompanies_xml – name: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
Score 3.4281957
Snippet A flip flop standard cell that includes a data input terminal configured to receive a data signal, clock input terminal configured to receive a clock signal, a...
SourceID epo
SourceType Open Access Repository
SubjectTerms INFORMATION STORAGE
PHYSICS
STATIC STORES
Title A MEMORY DEVICE WITH FLIP FLOP STANDARD CELL AND METHOD FOR LATCHING SIGNAL
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20201121&DB=EPODOC&locale=&CC=TW&NR=I711039B
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfR1NT8Iw9AXx86aoEb_Sg9ltkdmywWExW9vJdGwEJuiJbGwLXoDIjIm_3raCetFL07w2L-1LXt_3K8BV0SaZYaVYt4qc6KTARG9jkutp0cibiWUKnVxl-YZm55HcPzWfKjBd18KoPqHvqjmi4KiJ4PdSvdeLHycWU7mVy-v0RYDmt15sM21lHUtpdmNozLV5L2IR1Si145EW9m3fMmTQ092ATalEyy77fOjKmpTFb4Hi7cNWT-CalQdQ-ZjWYJeu_12rwU53Fe6uwbbKz5wsBXDFg8tDeHBQl3ej_jNifOhTjkZ-3EGesNDFEPXQIHZC5vQZojwIkJiL7XEnYkjYeyhwYiodVGjg34VOcATI4wKii_ONv0kxjkfri7j4GKqz-Sw_AdTACTZI0pDtVAnBWZK2MtNsm1YmnRQtUof6n2hO_1k7gz1J06_8vnOolq9v-YWQwWV6qcj3Cagwg5A
link.rule.ids 230,309,786,891,25594,76903
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3NT8IwFH9B_MCbokb87MHstshY2eCwmG3d3GQfBCrgiWxsC16AyIyJf71tA-pFL03z2jTtS15ff--rAHdFF2eKnqqyXuRYxoWK5a6Kczktmnk70TX2JhdRvpHmPeOnSXtSgfk2F0bUCf0QxRGZRM2YvJfivl79GLGIiK1c36evjLR8cKlBpA065tqspUjEMpx-TGJbsm2DjqVoYPi6wp2e1g7s6gwQCqA0snhOyuq3QnGPYK_P1lqUx1D5nNehZm__XavDQbhxd9dhX8RnztaMuJHB9Qn0TBQ6YTx4QcQZ-baDxj71kMsQOmviPhpSMyLmgCDbCQLE-mw69WKCGN5DgUltbqBCQ_8xMoNTQK7DKDLb3_SbFVM63h7EUs-gulgu8nNATTVRFZw0eTlVjNUsSTuZpnU1PeNGig5uQOPPZS7-GbuFmkfDYBr4Ue8SDjl_eRpeS7mCavn2nl8zfVymN4KVX_RUhnk
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=A+MEMORY+DEVICE+WITH+FLIP+FLOP+STANDARD+CELL+AND+METHOD+FOR+LATCHING+SIGNAL&rft.inventor=SAMRA%2C+NICK&rft.inventor=RUSU%2C+STEFAN&rft.inventor=GUO%2C+TA+PEN&rft.date=2020-11-21&rft.externalDBID=B&rft.externalDocID=TWI711039BB