Branch prediction power reduction
In one embodiment, a microprocessor is provided. The microprocessor includes instruction memory and a branch prediction unit. The branch prediction unit is configured to use information from the instruction memory to selectively power up the branch prediction unit from a powered-down state when fetc...
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Main Authors | , , , |
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Format | Patent |
Language | Chinese English |
Published |
01.10.2015
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Subjects | |
Online Access | Get full text |
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