Semiconductor integrated circuit device and process for manufacturing the same

• Main Authors: ENOMOTO, HIROYUKI, YAMADA, SATORU, OYU, KIYONORI, TOKUNAGA, TAKAFUMI, SEKIGUCHI, TOSHIHIRO
• Format: Patent
• Language: English
• Published: 01.11.2002
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

This invention provides a semiconductor integrated circuit device including a DRAM having fine memory cells and a reduced bit line capacitance. A side wall insulating film of a gate electrode 7 (word line WL) is constructed by a side wall insulating film 10 made of silicon nitride and a side wall insulating film 11 made of silicon oxide having a dielectric constant smaller than that of the side wall insulating film made of silicon nitride, thereby reducing a capacity for a word line of a bit line formed over the gate electrode 7 (word line WL). By setting the level of the upper end of the side wall insulating film 11 made of silicon oxide to be lower than the level of the top face of a cap insulating film 9, the diameter in the upper part of a plug buried in each of spaces (contact holes 12, 13) between the gate electrodes 7 is set to be larger than the diameter in the bottom part to assure a contact area between the contact hole 13 and a through hole formed on the contact hole.