AMPIC DRAM system
A technique and system for eliminating bus contention in multi-port internally cached dynamic random access memory (AMPIC DRAM) systems, while eliminating the need for external control paths and random memory addressing, through the use of data header destination bits and a novel dedication of reduc...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
16.05.2001
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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