Gate all around backside power rail formation with multi-color backside dielectric isolation scheme

Semiconductor devices and methods of manufacturing the same are described. The method includes forming distinct and separate bottom dielectric isolation layers underneath the source/drain and underneath the gate of a gate all around device. Selectively remove of the bottom dielectric isolation layer...

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Bibliographic Details
Main Authors PRANATHARTHIHARAN, BALASUBRAMANIAN, PAL, ASHISH, COLOMBEAU, BENJAMIN, BAZIZI, EL MEHDI, YEOH, ANDREW
Format Patent
LanguageChinese
English
Published 01.10.2023
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Semiconductor devices and methods of manufacturing the same are described. The method includes forming distinct and separate bottom dielectric isolation layers underneath the source/drain and underneath the gate of a gate all around device. Selectively remove of the bottom dielectric isolation layer underneath the source/drain results in better backside power rail (BPR) via alignment to the source/drain epi and reduces reliability and gate-shorting problems.
Bibliography:Application Number: TW202312103240