Matrix-vector processing system and method for performing vector reductions
A vector reduction circuit configured to reduce an input vector of elements comprises a plurality of cells, wherein each of the plurality of cells other than a designated first cell that receives a designated first element of the input vector is configured to receive a particular element of the inpu...
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Main Authors | , , |
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Format | Patent |
Language | Chinese English |
Published |
01.05.2023
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Subjects | |
Online Access | Get full text |
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