APA (7th ed.) Citation

VENTON, T. A., BURKY, W. E., BLANER, B., & BROWN, M. D. (2009). Apparatus, method and design strucuture for implementing speculative clock gating of digital logic circuits.

Chicago Style (17th ed.) Citation

VENTON, TODD A., WILLIAM E. BURKY, BARTHOLOMEW BLANER, and MARY D. BROWN. Apparatus, Method and Design Strucuture for Implementing Speculative Clock Gating of Digital Logic Circuits. 2009.

MLA (9th ed.) Citation

VENTON, TODD A., et al. Apparatus, Method and Design Strucuture for Implementing Speculative Clock Gating of Digital Logic Circuits. 2009.