System and method for a floating point unit with feedback prior to normalization and rounding

A system for performing floating point arithmetic operations including an input register adapted for receiving an operand. The system also includes a mechanism for performing a shift or masking operation in response to determining that the operand is in an un-normalized format. The system also inclu...

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Bibliographic Details
Main Authors SCHMOOKLER, MARTIN S, SCHWARZ, ERIC M, KROENER, MICHAEL, SON, DAO-TRONG, HAESS, JUERGEN, FLEISCHER, BRUCE M
Format Patent
LanguageChinese
English
Published 01.03.2007
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A system for performing floating point arithmetic operations including an input register adapted for receiving an operand. The system also includes a mechanism for performing a shift or masking operation in response to determining that the operand is in an un-normalized format. The system also includes instructions for performing single precision incrementing of the operand in response to determining that the operand is single precision, that the operand requires the incrementing based on the results of a previous operation and that the previous operation did not perform the incrementing. The operand was created in the previous operation. The system further includes instructions for performing double precision incrementing of the operand in response to determining that the operand is double precision, that the operand requires the incrementing based on the results of the previous operation and that the previous operation did not perform the incrementing.
Bibliography:Application Number: TW200695104110