SOI device and method for manufacturing the same

• Main Authors: WU, CHU-LUN, LIN, JYI-TSONG
• Format: Patent
• Language: Chinese; English
• Published: 01.10.2006
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention relates to a structure of Silicon-On-Insulator (SOI) MOSFET and the method for fabricating the same. The SOI MOSFET comprises a substrate, a buried oxide layer, a field oxide layer, a semiconductor conductive layer, a thin gate oxide layer, a gate poly layer, a second source and a second drain. The buried oxide layer and the field oxide layer are formed on the substrate at the same time by utilizing the same isolation technology. The field oxide layer is set up around the sides of the buried oxide layer. The semiconductor conductive layer is formed on the Buried oxide layer. This semiconductor conductive layer comprises a body, a first source and a first drain. The second source and the second drain are formed on the first source and the first drain, respectively. In this invention the Silicon-On-Insulator MOSFET possesses lower series resistance, can suppress the ultra-short channel effect and overcome the self-heating effect. In addition, the SOI MOSFET needs no expensive SOI wafer, so the cos