ARRAGEMENT FOR CHECKING MICROELECTRONIC LOGIC CIRCUITS

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Bibliographic Details
Main Authors YASHCHUK BORIS A,SU, PODDUBNYJ NIKOLAJ N,SU
Format Patent
LanguageEnglish
Published 05.02.1979
Subjects
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Author PODDUBNYJ NIKOLAJ N,SU
YASHCHUK BORIS A,SU
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RelatedCompanies PODDUBNYJ NIKOLAJ N,SU
YASHCHUK BORIS A,SU
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SubjectTerms MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
Title ARRAGEMENT FOR CHECKING MICROELECTRONIC LOGIC CIRCUITS
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