ESD PROTECTION CIRCUIT

A device having a substrate defined with a device region is presented. The device region includes an ESD protection circuit having a transistor. The transistor includes a gate having first and second sides, a first diffusion region disposed adjacent to the first side of the gate and a second diffusi...

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Main Authors LAI DA-WEI, LI MING
Format Patent
LanguageEnglish
Published 30.10.2014
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Abstract A device having a substrate defined with a device region is presented. The device region includes an ESD protection circuit having a transistor. The transistor includes a gate having first and second sides, a first diffusion region disposed adjacent to the first side of the gate and a second diffusion region displaced away from the second side of the gate. The device includes a first device well encompasses the device region and a second device well disposed within the first device well. The second device well encompasses the first diffusion region and at least a part of the gate. The device also includes a third well which is disposed within the second device well and a drain well which encompasses the second diffusion region and extends below the gate.
AbstractList A device having a substrate defined with a device region is presented. The device region includes an ESD protection circuit having a transistor. The transistor includes a gate having first and second sides, a first diffusion region disposed adjacent to the first side of the gate and a second diffusion region displaced away from the second side of the gate. The device includes a first device well encompasses the device region and a second device well disposed within the first device well. The second device well encompasses the first diffusion region and at least a part of the gate. The device also includes a third well which is disposed within the second device well and a drain well which encompasses the second diffusion region and extends below the gate.
Author LAI DA-WEI
LI MING
Author_xml – fullname: LAI DA-WEI
– fullname: LI MING
BookMark eNrjYmDJy89L5WQQcw12UQgI8g9xdQ7x9PdTcPYMcg71DOFhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfHB7kYGhiYGhoYGZhaOxkQpAgDDICFT
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
ExternalDocumentID SG2014011068A
GroupedDBID EVB
ID FETCH-epo_espacenet_SG2014011068A3
IEDL.DBID EVB
IngestDate Fri Jul 19 13:56:34 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_SG2014011068A3
Notes Application Number: SG20140011068
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20141030&DB=EPODOC&CC=SG&NR=2014011068A
ParticipantIDs epo_espacenet_SG2014011068A
PublicationCentury 2000
PublicationDate 20141030
PublicationDateYYYYMMDD 2014-10-30
PublicationDate_xml – month: 10
  year: 2014
  text: 20141030
  day: 30
PublicationDecade 2010
PublicationYear 2014
RelatedCompanies GLOBALFOUNDRIES SINGAPORE PTE. LTD
RelatedCompanies_xml – name: GLOBALFOUNDRIES SINGAPORE PTE. LTD
Score 2.9633899
Snippet A device having a substrate defined with a device region is presented. The device region includes an ESD protection circuit having a transistor. The transistor...
SourceID epo
SourceType Open Access Repository
Title ESD PROTECTION CIRCUIT
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20141030&DB=EPODOC&locale=&CC=SG&NR=2014011068A
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwY2BQMTczMEoG9nJ0LVJMTXVNzI3TdJMSDY11kw0tk5MNEi3NLCxA-519_cw8Qk28IkwjmBiyYXthwOeEloMPRwTmqGRgfi8Bl9cFiEEsF_DaymL9pEygUL69W4itixq0dwxatGhsoObiZOsa4O_i76zm7Gwb7K7mFwSWA1V1ZhaOzAysoHY06KB91zAn0LaUAuQ6xU2QgS0AaFxeiRADU2qeMAOnM-zqNWEGDl_ojDeQCc18xSIMYq7BLgoBQf4hruCFHwrOnkHOoZ4hogxKbq4hzh66QAvi4d6JD3ZHcoyxGAMLsJ-fKsGgYGyWBmzsJ5obm5kAOwVJJqC62hJYlBqlJSWlpZpaSDJI4zFICq-sNAMXiAcudA1kGFhKikpTZYG1aUmSHDgUAD9xc-s
link.rule.ids 230,309,786,891,25594,76904
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LS8NAEB5qFetNq0WtjyCSWzBt3ocgdpM00eZBkkpvIYkJiFCLjfj3nV1S7am3ZQdmHzDz7bc7Mwtwr6niuESWI-hviiLImlQLRT6ShHJklKWYG6qu03xnP1Ddufy8UBYd-NjkwrA6oT-sOCJaVIn23jB_vfq_xLJYbOX6oXjHrs9HJzUtvmXHNGhREnlrYtpRaIWEJ8RMpnwQMxmFOlV_2oN9DTkhLbRvv05oWspqG1OcYziIUN2yOYFOtexDj2y-XuvDod--eGOzNb71KQzsxOKiOExtFvjBES8mcy89gzvHTokr4ADZ33KyZLo1GWkAXeT51TlwklrjYT_XJFVGUlDIFKsNdKXjuijqStEvYLhD0eVO6S303NSfZTMveBnCEZUwByxeQbf5-q6uEVmb4obtyC_Q8XbW
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=ESD+PROTECTION+CIRCUIT&rft.inventor=LAI+DA-WEI&rft.inventor=LI+MING&rft.date=2014-10-30&rft.externalDBID=A&rft.externalDocID=SG2014011068A