GATE DRIVING CIRCUIT AND DISPLAY DEVICE HAVING THE SAME
A display device comprises: a display panel; a data driving circuit; a gate driving circuit; and a timing control portion. An nth (n is a natural number) stage of the gate driving circuit comprises: a first input portion which applies an input signal to a first node by responding to a first clock si...
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Format | Patent |
Language | English Korean |
Published |
08.12.2015
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Online Access | Get full text |
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Abstract | A display device comprises: a display panel; a data driving circuit; a gate driving circuit; and a timing control portion. An nth (n is a natural number) stage of the gate driving circuit comprises: a first input portion which applies an input signal to a first node by responding to a first clock signal; a first output portion which outputs a second clock signal into an nth gate output signal by responding to a first node signal applied to the first node; a second input portion which applies the first clock signal to a second node by responding to the first node signal; a second output portion which outputs a first voltage into the nth gate output signal by responding to a second node signal applied to the second node; and an output control portion which activates the first output portion by responding to an output control signal.
표시 장치는 표시 패널, 데이터 구동 회로, 게이트 구동 회로 및 타이밍 제어부를 포함한다. 게이트 구동 회로의 제N(N은 자연수) 스테이지는 제1 클럭 신호에 응답하여 입력 신호를 제1 노드에 인가하는 제1 입력부, 제1 노드에 인가된 제1 노드 신호에 응답하여 제2 클럭 신호를 제N 게이트 출력 신호로 출력하는 제1 출력부, 제1 노드 신호에 응답하여 제1 클럭 신호를 제2 노드에 인가하는 제2 입력부, 제2 노드에 인가된 제2 노드 신호에 응답하여 제1 전압을 제N 게이트 출력 신호로 출력하는 제2 출력부, 및 출력 제어 신호에 응답하여 제1 출력부를 활성화시키는 출력 제어부를 포함한다. |
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AbstractList | A display device comprises: a display panel; a data driving circuit; a gate driving circuit; and a timing control portion. An nth (n is a natural number) stage of the gate driving circuit comprises: a first input portion which applies an input signal to a first node by responding to a first clock signal; a first output portion which outputs a second clock signal into an nth gate output signal by responding to a first node signal applied to the first node; a second input portion which applies the first clock signal to a second node by responding to the first node signal; a second output portion which outputs a first voltage into the nth gate output signal by responding to a second node signal applied to the second node; and an output control portion which activates the first output portion by responding to an output control signal.
표시 장치는 표시 패널, 데이터 구동 회로, 게이트 구동 회로 및 타이밍 제어부를 포함한다. 게이트 구동 회로의 제N(N은 자연수) 스테이지는 제1 클럭 신호에 응답하여 입력 신호를 제1 노드에 인가하는 제1 입력부, 제1 노드에 인가된 제1 노드 신호에 응답하여 제2 클럭 신호를 제N 게이트 출력 신호로 출력하는 제1 출력부, 제1 노드 신호에 응답하여 제1 클럭 신호를 제2 노드에 인가하는 제2 입력부, 제2 노드에 인가된 제2 노드 신호에 응답하여 제1 전압을 제N 게이트 출력 신호로 출력하는 제2 출력부, 및 출력 제어 신호에 응답하여 제1 출력부를 활성화시키는 출력 제어부를 포함한다. |
Author | HER, YONG KOO |
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DocumentTitleAlternate | 게이트 구동 회로 및 이를 포함하는 표시 장치 |
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RelatedCompanies | SAMSUNG DISPLAY CO., LTD |
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Snippet | A display device comprises: a display panel; a data driving circuit; a gate driving circuit; and a timing control portion. An nth (n is a natural number) stage... |
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SubjectTerms | ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION CRYPTOGRAPHY DISPLAY EDUCATION PHYSICS SEALS |
Title | GATE DRIVING CIRCUIT AND DISPLAY DEVICE HAVING THE SAME |
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