BOOLEAN LOGIC IN A STATE MACHINE LATTICE

• Main Authors: NOYES HAROLD B, GLENDENNING PAUL, BROWN DAVID R, XU IRENE J
• Format: Patent
• Language: English; Korean
• Published: 21.08.2014
• Subjects: BASIC ELECTRONIC CIRCUITRY; CALCULATING; CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TOTRANSPORTATION; COMPUTING; CONTROL OR REGULATING SYSTEMS IN GENERAL; CONTROLLING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; ELECTRICITY; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS; PHYSICS; PULSE TECHNIQUE; REGULATING; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS; TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE

Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.