PASS/FAIL DETECTION CIRCUIT AND NON VOLATILE MEMORY DEVICE WITH THE SAME
PURPOSE: A pass and fail detecting circuit and a nonvolatile memory device including the same are provided to improve the accuracy of the pass and fail detecting circuit by offsetting a current loading in the pass and fail detecting circuit. CONSTITUTION: A first current shunt circuit(520) includes...
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Format | Patent |
Language | English Korean |
Published |
15.04.2013
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Subjects | |
Online Access | Get full text |
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Abstract | PURPOSE: A pass and fail detecting circuit and a nonvolatile memory device including the same are provided to improve the accuracy of the pass and fail detecting circuit by offsetting a current loading in the pass and fail detecting circuit. CONSTITUTION: A first current shunt circuit(520) includes a plurality of current shunts controlled according to a sensing node potential of a plurality of page buffers. A second current shunt circuit(530) includes a plurality of current shunts controlled according to a bit signal by an error allowable bit defined to correct data with errors among the data which is read through the plurality of page buffers. A pass and fail signal outputting unit(540) generates a pass signal or a fail signal by comparing the potential of a first node with the potential of a second node. A first offset circuit(550) shunts a current applied to the first current shunt circuit according to an offset signal by a distance between a voltage source and each current shunt of the first current shunt circuit. |
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AbstractList | PURPOSE: A pass and fail detecting circuit and a nonvolatile memory device including the same are provided to improve the accuracy of the pass and fail detecting circuit by offsetting a current loading in the pass and fail detecting circuit. CONSTITUTION: A first current shunt circuit(520) includes a plurality of current shunts controlled according to a sensing node potential of a plurality of page buffers. A second current shunt circuit(530) includes a plurality of current shunts controlled according to a bit signal by an error allowable bit defined to correct data with errors among the data which is read through the plurality of page buffers. A pass and fail signal outputting unit(540) generates a pass signal or a fail signal by comparing the potential of a first node with the potential of a second node. A first offset circuit(550) shunts a current applied to the first current shunt circuit according to an offset signal by a distance between a voltage source and each current shunt of the first current shunt circuit. |
Author | YANG, CHANG WON |
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Notes | Application Number: KR20110101389 |
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Snippet | PURPOSE: A pass and fail detecting circuit and a nonvolatile memory device including the same are provided to improve the accuracy of the pass and fail... |
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Title | PASS/FAIL DETECTION CIRCUIT AND NON VOLATILE MEMORY DEVICE WITH THE SAME |
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