THREE DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

PURPOSE: A three-dimensional semiconductor device for improving the degree of integration is provided to prevent other structures from being damaged while a cell structure is pattered since a top portion of the cell structure is formed by patterning an upper thin film structure. CONSTITUTION: Provid...

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Main Authors SHIM, JAE JOO, MUN, CHANG SUP, LIM, JONG HEUN, KIM, HYO JUNG, KIM, KYUNG HYUN
Format Patent
LanguageEnglish
Korean
Published 11.05.2012
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Abstract PURPOSE: A three-dimensional semiconductor device for improving the degree of integration is provided to prevent other structures from being damaged while a cell structure is pattered since a top portion of the cell structure is formed by patterning an upper thin film structure. CONSTITUTION: Provided is a substrate(10) including a cell array region(CAR) and a peripheral circuit region(PERI). A peripheral structure(100) including peripheral circuits is formed on the substrate in the peripheral circuit region. A lower cell structure(205) is formed on the substrate in the cell array region. An insulating layer(110) covering the peripheral structure and the lower cell structure are formed on the substrate. The insulating layer is planarized by using upper sides of the lower cell structure and the peripheral structure as a planarization end point. A top cell structure is formed on the lower cell structure.
AbstractList PURPOSE: A three-dimensional semiconductor device for improving the degree of integration is provided to prevent other structures from being damaged while a cell structure is pattered since a top portion of the cell structure is formed by patterning an upper thin film structure. CONSTITUTION: Provided is a substrate(10) including a cell array region(CAR) and a peripheral circuit region(PERI). A peripheral structure(100) including peripheral circuits is formed on the substrate in the peripheral circuit region. A lower cell structure(205) is formed on the substrate in the cell array region. An insulating layer(110) covering the peripheral structure and the lower cell structure are formed on the substrate. The insulating layer is planarized by using upper sides of the lower cell structure and the peripheral structure as a planarization end point. A top cell structure is formed on the lower cell structure.
Author MUN, CHANG SUP
SHIM, JAE JOO
KIM, KYUNG HYUN
LIM, JONG HEUN
KIM, HYO JUNG
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Snippet PURPOSE: A three-dimensional semiconductor device for improving the degree of integration is provided to prevent other structures from being damaged while a...
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SubjectTerms BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Title THREE DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
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