THREE DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
PURPOSE: A three-dimensional semiconductor device for improving the degree of integration is provided to prevent other structures from being damaged while a cell structure is pattered since a top portion of the cell structure is formed by patterning an upper thin film structure. CONSTITUTION: Provid...
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Main Authors | , , , , |
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Format | Patent |
Language | English Korean |
Published |
11.05.2012
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Subjects | |
Online Access | Get full text |
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Abstract | PURPOSE: A three-dimensional semiconductor device for improving the degree of integration is provided to prevent other structures from being damaged while a cell structure is pattered since a top portion of the cell structure is formed by patterning an upper thin film structure. CONSTITUTION: Provided is a substrate(10) including a cell array region(CAR) and a peripheral circuit region(PERI). A peripheral structure(100) including peripheral circuits is formed on the substrate in the peripheral circuit region. A lower cell structure(205) is formed on the substrate in the cell array region. An insulating layer(110) covering the peripheral structure and the lower cell structure are formed on the substrate. The insulating layer is planarized by using upper sides of the lower cell structure and the peripheral structure as a planarization end point. A top cell structure is formed on the lower cell structure. |
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AbstractList | PURPOSE: A three-dimensional semiconductor device for improving the degree of integration is provided to prevent other structures from being damaged while a cell structure is pattered since a top portion of the cell structure is formed by patterning an upper thin film structure. CONSTITUTION: Provided is a substrate(10) including a cell array region(CAR) and a peripheral circuit region(PERI). A peripheral structure(100) including peripheral circuits is formed on the substrate in the peripheral circuit region. A lower cell structure(205) is formed on the substrate in the cell array region. An insulating layer(110) covering the peripheral structure and the lower cell structure are formed on the substrate. The insulating layer is planarized by using upper sides of the lower cell structure and the peripheral structure as a planarization end point. A top cell structure is formed on the lower cell structure. |
Author | MUN, CHANG SUP SHIM, JAE JOO KIM, KYUNG HYUN LIM, JONG HEUN KIM, HYO JUNG |
Author_xml | – fullname: SHIM, JAE JOO – fullname: MUN, CHANG SUP – fullname: LIM, JONG HEUN – fullname: KIM, HYO JUNG – fullname: KIM, KYUNG HYUN |
BookMark | eNqNyr0KwjAUQOEMOvj3DhechZgqziG5NcEmgeTGtRSJk6SF-v7o4AM4Hfg4a7aoYy0r1pGJiKCtQ59s8LKDhM6q4HVWFCJovFuFIL0Gh2SChvarTvrcSkU5Wn8FMghJOtyy5XN4zWX364btWyRlDmUa-zJPw6PU8u5vUfCj4Px0acRZNv9dH50cMHE |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
ExternalDocumentID | KR20120047325A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_KR20120047325A3 |
IEDL.DBID | EVB |
IngestDate | Fri Aug 23 07:04:23 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English Korean |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_KR20120047325A3 |
Notes | Application Number: KR20100107827 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20120511&DB=EPODOC&CC=KR&NR=20120047325A |
ParticipantIDs | epo_espacenet_KR20120047325A |
PublicationCentury | 2000 |
PublicationDate | 20120511 |
PublicationDateYYYYMMDD | 2012-05-11 |
PublicationDate_xml | – month: 05 year: 2012 text: 20120511 day: 11 |
PublicationDecade | 2010 |
PublicationYear | 2012 |
RelatedCompanies | SAMSUNG ELECTRONICS CO., LTD |
RelatedCompanies_xml | – name: SAMSUNG ELECTRONICS CO., LTD |
Score | 2.829794 |
Snippet | PURPOSE: A three-dimensional semiconductor device for improving the degree of integration is provided to prevent other structures from being damaged while a... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | THREE DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20120511&DB=EPODOC&locale=&CC=KR&NR=20120047325A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dT8IwEL8gGvVNUYOKpolmb4vsi7EHYkbbZYjbyNgIb2Rja2I0QGTGf9-2gvLEW9tLLu2112t7d78CPPKZzC1uylSrm1uqmeml6jgWU9ncLjrdzNR1mQsThB0_NV-m1rQGH9tcGIkT-i3BEblGzbm-V3K_Xv0_YhEZW7l-yt940_LZS3pE2dyONZ2vMU0h_R4dRSTCCsa9YayE8S-tbdqGbrkHcCgO0gJpn076Ii9ltWtUvDM4GnF-i-ocau_LBpzg7d9rDTgONi5vXtxo3_oCXhM_phSRQUDDscSwRWMhxigkKU6iGBE6GWCK3JCggCZ-RBC_46HADVPPxUkqAh9Q4lM0dgN6CQ8eTbCv8m7N_qQwG8a7YzCuoL5YLsomoIIx22assFjXMW1HOLpYwTIjM5xibrbLa2jt43Szn3wLp6IqHOaa1oJ69flV3nE7XOX3Unw_RJWEkQ |
link.rule.ids | 230,309,786,891,25594,76904 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dT8IwEL8gGvFNUeMHahPN3hbZF2MPxIy2yxC2kdER3si-mhgNEJnx37eboDzx1vSSS3vX6-V6d78CPAlNJoZwZbLRTQxZj9VctiyDyzw1s0431lW16oXx_I4b6a8zY1aDj20vTIUT-l2BIwqLSoW9F9V9vfp_xCJVbeX6OXkTU8sXh_WItImOFVWcMUUi_R4dByTAEsa9YSj54S-trZuaatgHcGiKoLBE2qfTftmXstp1Ks4pHI0Fv0VxBrX3ZRMaePv3WhOOvU3KWww31rc-hxFzQ0oRGXjUn1QYtmhSijHwSYRZECJCpwNMke0T5FHmBgSJGA95th85NmZRWfiAmEvRxPboBTw6lGFXFsua_0lhPgx396BdQn2xXORXgDLOTZPzzOBdSzetMtHFMx5rsWZlqd7Or6G1j9PNfvIDNFzmjeajgT-8hZOSVCbPFaUF9eLzK78TPrlI7itR_gCeGYd8 |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=THREE+DIMENSIONAL+SEMICONDUCTOR+DEVICE+AND+METHOD+FOR+MANUFACTURING+THE+SAME&rft.inventor=SHIM%2C+JAE+JOO&rft.inventor=MUN%2C+CHANG+SUP&rft.inventor=LIM%2C+JONG+HEUN&rft.inventor=KIM%2C+HYO+JUNG&rft.inventor=KIM%2C+KYUNG+HYUN&rft.date=2012-05-11&rft.externalDBID=A&rft.externalDocID=KR20120047325A |