STACKED MEMORY DEVICE AND METHOD OF CORRECTING ERROR OF THE SAME
A stacked semiconductor memory device includes an error correction code (ECC) controller that controls the number of bits in an ECC word and corrects errors in memory cell array layers using the ECC word.
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Main Authors | , , , |
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Format | Patent |
Language | English Korean |
Published |
26.09.2011
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Subjects | |
Online Access | Get full text |
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Summary: | A stacked semiconductor memory device includes an error correction code (ECC) controller that controls the number of bits in an ECC word and corrects errors in memory cell array layers using the ECC word. |
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Bibliography: | Application Number: KR20100024406 |