OVERLAY VERNIER AND METHOD FOR FORMING THE SAME

PURPOSE: An overlay vernier and a forming method thereof are provided to efficiently read an overlay by preventing an overlay reading error by preventing the width of the vernier from widening after a slim/etch process which is repeated several times by forming an overlay vernier with a mesa structu...

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Bibliographic Details
Main Authors KOO, SUN YOUNG, LIM, CHANG MOON
Format Patent
LanguageEnglish
Korean
Published 06.01.2011
Subjects
APPARATUS SPECIALLY ADAPTED THEREFOR
BASIC ELECTRIC ELEMENTS
CINEMATOGRAPHY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
ELECTROGRAPHY
HOLOGRAPHY
MATERIALS THEREFOR
ORIGINALS THEREFOR
PHOTOGRAPHY
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES
PHYSICS
SEMICONDUCTOR DEVICES
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Summary:PURPOSE: An overlay vernier and a forming method thereof are provided to efficiently read an overlay by preventing an overlay reading error by preventing the width of the vernier from widening after a slim/etch process which is repeated several times by forming an overlay vernier with a mesa structure. CONSTITUTION: A polygonal main vernier has a plurality of laminated sub layers to form a step shape on both sides. A polygonal sub vernier is formed in the inner side of the main vernier. The main vernier has a polygonal frame type. A first oxide/poly layer(420) has the same width as a photosensitive pattern(410).
Bibliography:Application Number: KR20090059350