DIRECT MEMORY ACCESS CONTROLLER

A system has at least one bus, a central processing unit (CPU) coupled with the bus, a memory coupled with the bus, a direct memory access (DMA) controller having a plurality of DMA channels and operating independently from the CPU and being coupled with the bus, wherein for access to the bus the DM...

Full description

Saved in:
Bibliographic Details
Main Authors PESAVENTO RODNEY J, DAWSON STEVEN, TRIECE JOSEPH W, LAHTI GREGG D
Format Patent
LanguageEnglish
Korean
Published 01.09.2009
Subjects
Online AccessGet full text

Cover

Loading…