NONVOLATILE MEMORY DEVICE USING VARIABLE RESISTIVE ELEMENT
A nonvolatile memory device using a variable resistive element is provided to reduce the area of a core architecture by sharing a global bit line with a plurality of memory banks. A number of memory banks(110_1-110_8) include a number of nonvolatile memory cells including a variable resistive elemen...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
02.07.2008
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Subjects | |
Online Access | Get full text |
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Abstract | A nonvolatile memory device using a variable resistive element is provided to reduce the area of a core architecture by sharing a global bit line with a plurality of memory banks. A number of memory banks(110_1-110_8) include a number of nonvolatile memory cells including a variable resistive element with different resistance level according to data stored in each memory bank. A number of global bit lines(GBL0-GBLn+1) are arranged to be shared by the memory banks. Each of a number of main word lines is arranged in one memory bank. The global bit line includes a write global bit line used in writing data in the memory banks and a read global bit line used in reading data from the memory banks. |
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AbstractList | A nonvolatile memory device using a variable resistive element is provided to reduce the area of a core architecture by sharing a global bit line with a plurality of memory banks. A number of memory banks(110_1-110_8) include a number of nonvolatile memory cells including a variable resistive element with different resistance level according to data stored in each memory bank. A number of global bit lines(GBL0-GBLn+1) are arranged to be shared by the memory banks. Each of a number of main word lines is arranged in one memory bank. The global bit line includes a write global bit line used in writing data in the memory banks and a read global bit line used in reading data from the memory banks. |
Author | CHOI, BYUNG GIL CHO, BEAK HYUNG |
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Snippet | A nonvolatile memory device using a variable resistive element is provided to reduce the area of a core architecture by sharing a global bit line with a... |
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Title | NONVOLATILE MEMORY DEVICE USING VARIABLE RESISTIVE ELEMENT |
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