SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
A semiconductor device and a method of manufacturing the same are provided to increase a coupling rate by increasing an area of a gate interlayer dielectric to be inserted between a floating gate electrode and a control gate electrode. A gate insulating layer(102) is formed on an upper surface of a...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
16.04.2008
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Subjects | |
Online Access | Get full text |
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Abstract | A semiconductor device and a method of manufacturing the same are provided to increase a coupling rate by increasing an area of a gate interlayer dielectric to be inserted between a floating gate electrode and a control gate electrode. A gate insulating layer(102) is formed on an upper surface of a semiconductor substrate(100). A floating gate electrode(104) is formed on an upper surface of the gate insulating layer. A gate interlayer dielectric is formed to surround an upper part and a lateral part of the floating gate electrode. A control gate electrode(108) is formed to surround the gate interlayer dielectric. An impurity region(110) is formed on the semiconductor substrate corresponding to both sides of the floating gate electrode. The gate interlayer dielectric includes a first gate interlayer dielectric(106) of the upper part of the floating gate electrode and a second gate interlayer dielectric of the lateral part of the floating gate electrode. |
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AbstractList | A semiconductor device and a method of manufacturing the same are provided to increase a coupling rate by increasing an area of a gate interlayer dielectric to be inserted between a floating gate electrode and a control gate electrode. A gate insulating layer(102) is formed on an upper surface of a semiconductor substrate(100). A floating gate electrode(104) is formed on an upper surface of the gate insulating layer. A gate interlayer dielectric is formed to surround an upper part and a lateral part of the floating gate electrode. A control gate electrode(108) is formed to surround the gate interlayer dielectric. An impurity region(110) is formed on the semiconductor substrate corresponding to both sides of the floating gate electrode. The gate interlayer dielectric includes a first gate interlayer dielectric(106) of the upper part of the floating gate electrode and a second gate interlayer dielectric of the lateral part of the floating gate electrode. |
Author | JOO, KYUNG JOONG SEO, SEUNG GUN CHANG, SUNG NAM BAEK, EUN JIN CHANG, DONG WON |
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Snippet | A semiconductor device and a method of manufacturing the same are provided to increase a coupling rate by increasing an area of a gate interlayer dielectric to... |
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SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME |
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