SYSTEM AND METHOD OF MEASURING LOW IMPEDANCE OF POWER LOOP

• Main Authors: HOUGHTON CHRISTOPHER L, KANTOROVICH ISAAC, ST. LAURENT JAMES J
• Format: Patent
• Language: English; Korean
• Published: 28.04.2004
• Edition: 7
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; MEASURING; MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES; PHYSICS; TESTING

PURPOSE: A system and a method of measuring a low impedance are provided to measure the low impedance of a power loop over a wide bandwidth at various points on a semiconductor die, an electronic chip packaging, and a printed circuit board. CONSTITUTION: A microprocessor is maintained in a reset mode and a first current level is measured by providing a frequency FCLK to the microprocessor(57,58). The microprocessor is maintained in the reset mode and a second current level is measured by providing a frequency FCLK/N to the microprocessor(59,60). The microprocessor is maintained in the reset mode and the clock frequency is toggled between the frequency FCLK and the frequency FCLK/N in order to generate a periodic current waveform(61). At least one set of voltage measurements are obtained by measuring repeatedly voltages at one or more ports in the system(62). An average of the sets of voltage measurements is obtained(63). A filtered average voltage is generated by removing clock frequency-dependent noises(64). An impedance is determined by dividing a Fourier component of the filtered average voltage by a Fourier component of the periodic current waveform having first and second current levels(65).