SCHOTTKY BARRIER DIODE AND METHOD OF FABRICATING THE SAME
PURPOSE: To solve the problem that a chip cannot be miniaturized smoothly due to mesa etching and a thick polyimide layer and characteristics cannot be improved due to the distance between electrodes in a Schottky barrier diode, and etching at a Schottky junction section cannot be controlled easily...
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Main Authors | , , , , , , , |
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Format | Patent |
Language | English Korean |
Published |
06.03.2003
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Abstract | PURPOSE: To solve the problem that a chip cannot be miniaturized smoothly due to mesa etching and a thick polyimide layer and characteristics cannot be improved due to the distance between electrodes in a Schottky barrier diode, and etching at a Schottky junction section cannot be controlled easily in a manufacturing method of a Schottky barrier diode. CONSTITUTION: N- and n+-type ion implanted regions are provided on a substrate surface as an operation region, thus eliminating the need for mesa and a polyimide layer, and achieving the planar type Schottky barrier diode of a compound semiconductor. The costs of a wafer can also be reduced, and the distance between electrodes can be reduced, thus shrinking the chip, and improving high-frequency characteristics. Additionally, GaAs is not etched when a Schottky junction region is formed, thus manufacturing a Schottky barrier diode having excellent reproducibility.
종래, 메사 에칭이나 두꺼운 폴리이미드층 등이 있기 때문에, 칩의 소형화가 실현되지 않고, 전극간에 거리가 있어 특성을 향상할 수 없었다. 또한, 제조 방법에서는 쇼트키 접합 부분의 에칭의 컨트롤이 곤란하였다. 기판 표면에 n형 및 n형 이온 주입 영역을 형성하여 동작 영역으로 함으로써, 메사 및 폴리이미드층을 형성할 필요가 없어져, 화합물 반도체의 플래너형 쇼트키 배리어 다이오드를 실현할 수 있다. 웨이퍼의 비용도 저감되며, 전극간 거리를 접근시킬 수 있으므로 칩의 축소가 실현되고, 고주파 특성도 향상된다. 또한, 쇼트키 전극 형성시에는 GaAs를 에칭하지 않으므로, 재현성이 좋은 쇼트키 배리어 다이오드를 제조할 수 있다. |
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AbstractList | PURPOSE: To solve the problem that a chip cannot be miniaturized smoothly due to mesa etching and a thick polyimide layer and characteristics cannot be improved due to the distance between electrodes in a Schottky barrier diode, and etching at a Schottky junction section cannot be controlled easily in a manufacturing method of a Schottky barrier diode. CONSTITUTION: N- and n+-type ion implanted regions are provided on a substrate surface as an operation region, thus eliminating the need for mesa and a polyimide layer, and achieving the planar type Schottky barrier diode of a compound semiconductor. The costs of a wafer can also be reduced, and the distance between electrodes can be reduced, thus shrinking the chip, and improving high-frequency characteristics. Additionally, GaAs is not etched when a Schottky junction region is formed, thus manufacturing a Schottky barrier diode having excellent reproducibility.
종래, 메사 에칭이나 두꺼운 폴리이미드층 등이 있기 때문에, 칩의 소형화가 실현되지 않고, 전극간에 거리가 있어 특성을 향상할 수 없었다. 또한, 제조 방법에서는 쇼트키 접합 부분의 에칭의 컨트롤이 곤란하였다. 기판 표면에 n형 및 n형 이온 주입 영역을 형성하여 동작 영역으로 함으로써, 메사 및 폴리이미드층을 형성할 필요가 없어져, 화합물 반도체의 플래너형 쇼트키 배리어 다이오드를 실현할 수 있다. 웨이퍼의 비용도 저감되며, 전극간 거리를 접근시킬 수 있으므로 칩의 축소가 실현되고, 고주파 특성도 향상된다. 또한, 쇼트키 전극 형성시에는 GaAs를 에칭하지 않으므로, 재현성이 좋은 쇼트키 배리어 다이오드를 제조할 수 있다. |
Author | ASANO TETSURO NAKAJIMA YOSHIBUMI SAKAKIBARA MIKITO TOMINAGA HISAAKI HIRATA KOICHI ISHIHARA HIDETOSHI MURAI SHIGEYUKI ONODA KATSUAKI |
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Snippet | PURPOSE: To solve the problem that a chip cannot be miniaturized smoothly due to mesa etching and a thick polyimide layer and characteristics cannot be... |
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SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | SCHOTTKY BARRIER DIODE AND METHOD OF FABRICATING THE SAME |
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