INTERFACE SYSTEM AND FLAT PANEL DISPLAY USING THE SAME

An interface system and a flat panel display using the same are provided to transmit information corresponding to two bits at once between a transmitting circuit disposed in an external system and a receiving circuit disposed in a panel, thereby lowering a clock frequency. A serializer(202) receives...

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Bibliographic Details
Main Authors JO, YOUNG KWON, KIM, SUKI, KIM, SUNG HA
Format Patent
LanguageEnglish
Published 23.09.2008
Subjects
ADVERTISING
ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION
BASIC ELECTRONIC CIRCUITRY
CRYPTOGRAPHY
DISPLAY
EDUCATION
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS
PHYSICS
PULSE TECHNIQUE
RESONATORS
SEALS
TRANSMISSION
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:An interface system and a flat panel display using the same are provided to transmit information corresponding to two bits at once between a transmitting circuit disposed in an external system and a receiving circuit disposed in a panel, thereby lowering a clock frequency. A serializer(202) receives first and second data having plural bits from the outside, and sequentially outputs the bits of the received first and second data. A transmitting circuit(204) generates four voltage levels in correspondence with two bits supplied from the serializer. A receiving circuit(212) restores the two bits by using the voltage level supplied from the transmitting circuit. A deserializer restores the first and second data as sequentially storing the two bits supplied from the receiving circuit. The serializer includes first and second serializing units for sequentially outputting bits of the first and second data.
Bibliography:Application Number: KR20070035004