MICROPROGRAM CONTROL SYSTEM
PURPOSE:To improve the availability of a microprogram control system by putting a switch instruction between a ROM and a RAM into a microinstruction and performing switch between the RAM and the ROM reading out the microinstruction to ensure free switching between the ROM and the RAM. CONSTITUTION:A...
Saved in:
Main Authors | , |
---|---|
Format | Patent |
Language | English |
Published |
23.04.1988
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Abstract | PURPOSE:To improve the availability of a microprogram control system by putting a switch instruction between a ROM and a RAM into a microinstruction and performing switch between the RAM and the ROM reading out the microinstruction to ensure free switching between the ROM and the RAM. CONSTITUTION:An address signals received from a microaddress register 1 are supplied to a ROM 4 and a RAM 5 and a microinstruction stored in an address is read out of the ROM 4 or the RAM 5 that is set under active state by the output of a chip selecting part 3. Then the read microinstruction is stored in a microinstruction register 6. The microinstruction includes a ROM/ RAM switching bit 7 to show whether the ROM 4 or the RAM 5 should be chip-enabled previously in the next address cycle. When the contents of the bit 7 are supplied to the part 3, either the ROM 4 or the RAM 5 to be chip- enabled is decided in the next address cycle. |
---|---|
AbstractList | PURPOSE:To improve the availability of a microprogram control system by putting a switch instruction between a ROM and a RAM into a microinstruction and performing switch between the RAM and the ROM reading out the microinstruction to ensure free switching between the ROM and the RAM. CONSTITUTION:An address signals received from a microaddress register 1 are supplied to a ROM 4 and a RAM 5 and a microinstruction stored in an address is read out of the ROM 4 or the RAM 5 that is set under active state by the output of a chip selecting part 3. Then the read microinstruction is stored in a microinstruction register 6. The microinstruction includes a ROM/ RAM switching bit 7 to show whether the ROM 4 or the RAM 5 should be chip-enabled previously in the next address cycle. When the contents of the bit 7 are supplied to the part 3, either the ROM 4 or the RAM 5 to be chip- enabled is decided in the next address cycle. |
Author | NAKAI KOICHI YU KEIICHI |
Author_xml | – fullname: NAKAI KOICHI – fullname: YU KEIICHI |
BookMark | eNrjYmDJy89L5WSQ9vV0DvIPCPJ3D3L0VXD29wsJ8vdRCI4MDnH15WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8V4BwWbGlsYGpmaOxkQoAQAOWyKO |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences Physics |
ExternalDocumentID | JPS6393056A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_JPS6393056A3 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 19 11:53:47 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_JPS6393056A3 |
Notes | Application Number: JP19860237205 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19880423&DB=EPODOC&CC=JP&NR=S6393056A |
ParticipantIDs | epo_espacenet_JPS6393056A |
PublicationCentury | 1900 |
PublicationDate | 19880423 |
PublicationDateYYYYMMDD | 1988-04-23 |
PublicationDate_xml | – month: 04 year: 1988 text: 19880423 day: 23 |
PublicationDecade | 1980 |
PublicationYear | 1988 |
RelatedCompanies | HITACHI LTD |
RelatedCompanies_xml | – name: HITACHI LTD |
Score | 2.3900416 |
Snippet | PURPOSE:To improve the availability of a microprogram control system by putting a switch instruction between a ROM and a RAM into a microinstruction and... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
Title | MICROPROGRAM CONTROL SYSTEM |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19880423&DB=EPODOC&locale=&CC=JP&NR=S6393056A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3NT4MwFH-Z8_Om6OKcGg6GGzGBAuNAzMaHCxFKAM08LXw12WUugvHf97Vu04te2-S1fenr730X4K5GM2NcskIlGtomxCBMLTWzVJmB4Mc9DnXDDcUoNmfPJJwb8x4st7Uwok_op2iOiBJVobx34r1e_zixPJFb2d6XSxx6ewhyx1Pq73IxvIyoHije1PET6lFXcV0nTJQ4dTJEYq4tT_ZgH7Voi2d_-S9TXpSy_o0owSkcJEhs1Z1Br1lJcOxuP16T4CjaxLslOBQJmlWLgxshbM9hhJxLaZLSx3QSyS6N85Q-ydlrlvvRBciBn7szFddb7M62CJPdzvQB9NHkby5BRp0KkZ2ZRlOYxGTEtvTKIjZjdlHYdjEewvBPMlf_zI3ghDOJR0M0_Rr63ftHc4Og2pW3gh1fuj14AA |
link.rule.ids | 230,309,783,888,25578,76884 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1JT4NAFH6pdak3RY21LhwMN2ICA4UDMS2LiGwBNPXUsE3SS20E49_3DbbVi15nkjczL_Pme_sA3FZoZmgFzUUioW1CFELFQlILkSoIfszjUNXMUAxC1X0m3kyZ9WCxqYXp-oR-ds0RUaJKlPe2e69XP04sq8utbO6KBQ693TuZYQnVd7kYXkZUDwRrathxZEWmYJqGFwthYqSIxExbnuzALmrYGmuzb79MWVHK6jeiOEewFyOxZXsMvXrJwcDcfLzGwUGwjndzsN8laJYNDq6FsDmBEXIuieIkekgmAW9GYZZEPp--ppkdnALv2JnpirjefHu2uRdvdyafQR9N_voceNSpENmpqtS5SlRK9LFcjolOqZ7nup5rQxj-Sebin7kbGLhZ4M_9x_BpBIeMYSwyIsmX0G_fP-orBNi2uO5Y8wWBY3rw |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=MICROPROGRAM+CONTROL+SYSTEM&rft.inventor=NAKAI+KOICHI&rft.inventor=YU+KEIICHI&rft.date=1988-04-23&rft.externalDBID=A&rft.externalDocID=JPS6393056A |