LOOP BUS CONTROL SYSTEM

PURPOSE:To prevent the decrease in transmission efficiency by eliminating a defective frame being left unreceived by a data processor on a loop bus. CONSTITUTION:Suppose that a fault occurs in a data processor B7 connected to the loop bus 1 and a frame transmitted from other data processors to the d...

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Bibliographic Details
Main Authors AOYAMA HIDEO, SUGANO HIROYUKI
Format Patent
LanguageEnglish
Published 25.08.1984
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:PURPOSE:To prevent the decrease in transmission efficiency by eliminating a defective frame being left unreceived by a data processor on a loop bus. CONSTITUTION:Suppose that a fault occurs in a data processor B7 connected to the loop bus 1 and a frame transmitted from other data processors to the data processor B7 is left unreceived on the loop bus 1. In this case, a data processor A2 changes the own address value into an address value of the data processor B7 temporarily. Thus, the defective frame left on the loop bus 1 is eliminated and the interference of the defective frame on normal frames is prevented.
Bibliography:Application Number: JP19830022558