LEVEL DETECTOR

• Main Authors: KOBORI YASUNORI, OKAMOTO CHIKAYUKI, GOTOU KATSUHIKO
• Format: Patent
• Language: English
• Published: 14.09.1983
• Subjects: BASIC ELECTRONIC CIRCUITRY; CODE CONVERSION IN GENERAL; CODING; DECODING; ELECTRICITY; PULSE TECHNIQUE

PURPOSE:To attain stable operation even if a level detecting terminal is grounded and to obtain a discriminating output of a desired level, by applying an external control input to the emitter of a PNP transistor (TR) for high level detection. CONSTITUTION:Where Vk is a voltage of a reference voltage source 17, a forward base-to-emitter voltage of a PNP TR15 is Vf15, that of NPN TRs2, 3 is Vf2, Vf3 and V11 is an applied voltage at a terminal 11, the TR2 turns off with Vf2<V11 and turns on at Vf2>V11. A TR15 turns off at V11<Vk+Vf15 and turns on at V11>Vk+Vf15. The TR3 turns on at >=Vf3 of a voltage across a resistor 7, and turns off at <=Vf3. Thus, when the voltage V11 is over (Vk+Vf15+Vf3XR16/R7), (state A' of Fig.), the TRs2, 3 turn on, and when the voltage V11 is less than the said value and over the Vf2, (state B' in Fig.), the TR2 turns on and the TR3 turns off, and when the voltage V11 is less than the Vf2, (state C' in Fig.), the TRs2, 3 are turned off. Even if the terminal 11 is grounded, each TR is turned off surely to offer stable operation. Then, the level detection of the voltage V11 is done with ''H'', ''L'' of output signals (b), (d) of the TRs2, 3.