SEMICONDUCTOR DEVICE
PROBLEM TO BE SOLVED: To easily changeover the refresh period during a refresh time of memory which requires refresh from the external side by providing a logic circuit to supply a period setting signal for designating one of a plurality of refresh periods and a clock to the memory. SOLUTION: CPU1 s...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
08.10.1999
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Edition | 6 |
Subjects | |
Online Access | Get full text |
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Abstract | PROBLEM TO BE SOLVED: To easily changeover the refresh period during a refresh time of memory which requires refresh from the external side by providing a logic circuit to supply a period setting signal for designating one of a plurality of refresh periods and a clock to the memory. SOLUTION: CPU1 supplies, depending on an external low power mode instruction LPM, a clock CP, an auto-refresh period setting signal RAUTO, a self-refresh control signal RSELF and a refresh period setting signal SLFPS to control DRAM core 2. Namely, CPU1 changes over the refresh period by the refresh period setting signal SLFPS during the self-refresh of DRAM core 2 to set the DRAM core 2 to the self-refresh mode and elongates the refresh period of the DRAM core 2 in the timing wherein internal temperature of the semiconductor device is sufficiently lowered. |
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AbstractList | PROBLEM TO BE SOLVED: To easily changeover the refresh period during a refresh time of memory which requires refresh from the external side by providing a logic circuit to supply a period setting signal for designating one of a plurality of refresh periods and a clock to the memory. SOLUTION: CPU1 supplies, depending on an external low power mode instruction LPM, a clock CP, an auto-refresh period setting signal RAUTO, a self-refresh control signal RSELF and a refresh period setting signal SLFPS to control DRAM core 2. Namely, CPU1 changes over the refresh period by the refresh period setting signal SLFPS during the self-refresh of DRAM core 2 to set the DRAM core 2 to the self-refresh mode and elongates the refresh period of the DRAM core 2 in the timing wherein internal temperature of the semiconductor device is sufficiently lowered. |
Author | FUJIMOTO TOMONORI OTA KIYOTO |
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Notes | Application Number: JP19980073627 |
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RelatedCompanies | MATSUSHITA ELECTRIC IND CO LTD |
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Snippet | PROBLEM TO BE SOLVED: To easily changeover the refresh period during a refresh time of memory which requires refresh from the external side by providing a... |
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SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES |
Title | SEMICONDUCTOR DEVICE |
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