NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURE THEREOF
PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device corresponding to a fine process by using a low-stem difference double-layer polysilicon structure. SOLUTION: The semiconductor memory device has two channel regions L1 and L2 between a source region 2 and a drain region 3. Th...
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Main Authors | , , , , , , |
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Format | Patent |
Language | English |
Published |
02.12.1997
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Edition | 6 |
Subjects | |
Online Access | Get full text |
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Abstract | PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device corresponding to a fine process by using a low-stem difference double-layer polysilicon structure. SOLUTION: The semiconductor memory device has two channel regions L1 and L2 between a source region 2 and a drain region 3. The channel region L1 on the drain region side is formed under a floating gate electrode 24 via a gate insulating film 23, and the channel region L2 on the source region side is formed under a control gate electrode 30 via the gate insulating film 23. The control gate 30 is provided on the floating gate 24 via an insulating film 31, and further, the control gate 30 is formed in line in a channel length direction of the two channel regions. The source region 2 and the drain region 3 are arranged in line in a channel width direction such that these regions are owned in common by a plurality of semiconductor memory devices. Further, the source region 2 and the drain region 3 are alternately arranged in the channel length direction such that these regions are owned in common by adjacent semiconductor memory devices. |
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AbstractList | PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device corresponding to a fine process by using a low-stem difference double-layer polysilicon structure. SOLUTION: The semiconductor memory device has two channel regions L1 and L2 between a source region 2 and a drain region 3. The channel region L1 on the drain region side is formed under a floating gate electrode 24 via a gate insulating film 23, and the channel region L2 on the source region side is formed under a control gate electrode 30 via the gate insulating film 23. The control gate 30 is provided on the floating gate 24 via an insulating film 31, and further, the control gate 30 is formed in line in a channel length direction of the two channel regions. The source region 2 and the drain region 3 are arranged in line in a channel width direction such that these regions are owned in common by a plurality of semiconductor memory devices. Further, the source region 2 and the drain region 3 are alternately arranged in the channel length direction such that these regions are owned in common by adjacent semiconductor memory devices. |
Author | MORI KOJI ABE SHUYA TANAKA MAKOTO KUSUNOKI MASAMUNE ITSUSHIKI KAIHEI JIKUTANI NAOTO YAMAGUCHI KIYOSHI |
Author_xml | – fullname: TANAKA MAKOTO – fullname: ITSUSHIKI KAIHEI – fullname: YAMAGUCHI KIYOSHI – fullname: KUSUNOKI MASAMUNE – fullname: ABE SHUYA – fullname: MORI KOJI – fullname: JIKUTANI NAOTO |
BookMark | eNrjYmDJy89L5WSw9_P3C_P3cQzx9HFVCHb19XT293MJdQ7xD1LwdfX1D4pUcHEN83R2VXD0c1HwdfQLdXN0DgkNclUI8XANcvV342FgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8V4BHgaWxoZGxhZGjsbEqAEAx-gsrA |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences Physics |
Edition | 6 |
ExternalDocumentID | JPH09312382A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_JPH09312382A3 |
IEDL.DBID | EVB |
IngestDate | Fri Aug 09 05:01:25 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_JPH09312382A3 |
Notes | Application Number: JP19970030097 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19971202&DB=EPODOC&CC=JP&NR=H09312382A |
ParticipantIDs | epo_espacenet_JPH09312382A |
PublicationCentury | 1900 |
PublicationDate | 19971202 |
PublicationDateYYYYMMDD | 1997-12-02 |
PublicationDate_xml | – month: 12 year: 1997 text: 19971202 day: 02 |
PublicationDecade | 1990 |
PublicationYear | 1997 |
RelatedCompanies | RICOH CO LTD |
RelatedCompanies_xml | – name: RICOH CO LTD |
Score | 2.4816494 |
Snippet | PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device corresponding to a fine process by using a low-stem difference double-layer... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES |
Title | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURE THEREOF |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19971202&DB=EPODOC&locale=&CC=JP&NR=H09312382A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LS8NAEB5qfd60KlofrCC5Bc2jaXsIJd3dkJYmG2Ja6qlkkxX0kBYb8e-7WVr1otdZGIaBmdlv95sZgHuHG4XBuaFbuejqNncyvc8tiVolvMhMq585ogaKYeQEU3s878wb8LbthVFzQj_VcEQZUbmM90rl69XPIxZR3Mr1A3-VouXAT12iFZt2sa4hwbxGhi6NGWFYw9gdx1qUuIFE7jJJ90xvB3blNbpb07_obFh3pax-lxT_GPZiqa2sTqAhyhYc4u3mtRYchJsP7xbsK4ZmvpbCTRSuT2EQsWjGJl46mlD0VDuSRWSKU5agkIYseUaEzkaYIi8iKPSiqe_hmt2A0oAmlPlncOfTFAe6tGnx7YDFOP4x3zqHZrksxQWgRyPnwi6EeDEzuyc6mVMUXAZYvU6nbxXGJbT_1tP-7_AKjtSY1pq2YV5Ds3r_EDey-Fb8VnntCwUIgz0 |
link.rule.ids | 230,309,783,888,25578,76884 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LT4NAEJ7U-qg3rRqtL0wMN6I8StsDaeiyhFbYJUibempYWBM90EYw_n0X0lovep1NJpNJZma_3W9mAO5NpmYqY6qip7ynGMxMlAHTBWoV8CLR9EFi8gooBsT0psZk3p034H3TC1PPCf2qhyOKiEpFvJd1vl5tH7GcmltZPLA3IVoO3dhy5GzdLtZTBZiXnZGFQ-pQJCNkTUKZRJYnkLtI0n3N3oFdccXuV3P28WxUdaWsfpcU9wj2QqEtL4-hwfM2tNBm81obDoL1h3cb9muGZloI4ToKixMYEkpm1LfjsY-l58qRlDhTFNNICnBAoxfJwbMxwpJNHCmwydS1UcVukGIPR5i6p3Dn4hh5irBp8eOAxSTcmq-fQTNf5vwcpEc1ZdzIOH_VEqPPu4mZZUwEWLVOZ6Bn6gV0_tbT-e_wFlpeHPgLf0yeLuGwHtlaUTi0K2iWH5_8WhTikt3UHvwGVCSGLQ |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=NONVOLATILE+SEMICONDUCTOR+MEMORY+DEVICE+AND+MANUFACTURE+THEREOF&rft.inventor=TANAKA+MAKOTO&rft.inventor=ITSUSHIKI+KAIHEI&rft.inventor=YAMAGUCHI+KIYOSHI&rft.inventor=KUSUNOKI+MASAMUNE&rft.inventor=ABE+SHUYA&rft.inventor=MORI+KOJI&rft.inventor=JIKUTANI+NAOTO&rft.date=1997-12-02&rft.externalDBID=A&rft.externalDocID=JPH09312382A |