SEMICONDUCTOR MEMORY AND COMPUTER SYSTEM USING THE SAME
PURPOSE: To provide a semiconductor memory and a computer system capable of reducing variations of an access time of RAM, etc., by reducing a difference between the maximum access time and the minimum access time by means of delaying the minimum access time. CONSTITUTION: A latch circuit for an addr...
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Main Author | |
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Format | Patent |
Language | English |
Published |
22.11.1996
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Edition | 6 |
Subjects | |
Online Access | Get full text |
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Abstract | PURPOSE: To provide a semiconductor memory and a computer system capable of reducing variations of an access time of RAM, etc., by reducing a difference between the maximum access time and the minimum access time by means of delaying the minimum access time. CONSTITUTION: A latch circuit for an address signal, a memory array, a sense amplifier, further, a delay circuit for a clock signal, a pulse width adjusting circuit for the delayed clock signal, etc., constitute a RAM, and a current switch circuit 8 consisting of a differential amplifier 6 for detecting level change of the output data outputted from the memory cells, a level adjusting circuit 7 for adjusting the output level, and in addition current switch circuit 8 consisting of D-type flip-flop circuit are added to a sense amplifier 3 and constitute it. A mode is switched over to a hold mode or a through mode and an output data outputted from the memory cells in the hold mode is held for a prescribed time and outputted. |
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AbstractList | PURPOSE: To provide a semiconductor memory and a computer system capable of reducing variations of an access time of RAM, etc., by reducing a difference between the maximum access time and the minimum access time by means of delaying the minimum access time. CONSTITUTION: A latch circuit for an address signal, a memory array, a sense amplifier, further, a delay circuit for a clock signal, a pulse width adjusting circuit for the delayed clock signal, etc., constitute a RAM, and a current switch circuit 8 consisting of a differential amplifier 6 for detecting level change of the output data outputted from the memory cells, a level adjusting circuit 7 for adjusting the output level, and in addition current switch circuit 8 consisting of D-type flip-flop circuit are added to a sense amplifier 3 and constitute it. A mode is switched over to a hold mode or a through mode and an output data outputted from the memory cells in the hold mode is held for a prescribed time and outputted. |
Author | USAMI MASAMI |
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Edition | 6 |
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Notes | Application Number: JP19950107729 |
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PublicationDate | 19961122 |
PublicationDateYYYYMMDD | 1996-11-22 |
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PublicationYear | 1996 |
RelatedCompanies | HITACHI LTD |
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Snippet | PURPOSE: To provide a semiconductor memory and a computer system capable of reducing variations of an access time of RAM, etc., by reducing a difference... |
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SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES |
Title | SEMICONDUCTOR MEMORY AND COMPUTER SYSTEM USING THE SAME |
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